Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-10-31
2004-10-12
Liang, Regina (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S062000, C345S211000
Reexamination Certificate
active
06803889
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority of Japanese Patent Application No. 2001-012418, filed on Jan. 19, 2001, the contents being incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to plasma display device and methods for controlling the plasma display device. More particularly, the present invention relates to a plasma display device and a method for controlling the plasma display device which are preferably employed for an AC-driven plasma display device having different reference potentials between the drive circuit for driving each of the cells constituting the display portion and the drive control circuit for controlling the drive circuit.
2. Description of the Related Art
Conventionally, AC-driven plasma display panels (PDPs), one of flat display panels, are classified into two-electrode type PDPs which perform selective discharge (address discharge) and sustain discharge using two electrodes and three-electrode type PDPs which perform address discharge using a third electrode. The three-electrode type PDPs are further classified into a type with the third electrode formed on a substrate on which the first and second electrodes for performing sustain discharge are laid out and a type with the third electrode formed on another substrate opposite to the substrate of the first and second electrodes.
All types of the above PDP devices are based on the same operation principle. The arrangement of a PDP device in which the first and second electrodes for performing sustain discharge are formed on the first substrate, and the third electrode is formed on the second substrate opposite to the first substrate will be described below.
FIG. 17
is a view showing the overall arrangement of an AC-driven PDP device. In the AC-driven PDP device
1
shown in
FIG. 17
, a plurality of cells each corresponding to one pixel of a display image are arrayed in a matrix.
FIG. 17
shows an AC-driven PDP device having cells arrayed in a matrix with m rows by n columns. The AC-driven PDP
1
also has scanning electrodes Y
1
to Yn and common electrodes X, which are formed to run parallel on the first substrate, and address electrodes A
1
to Am which are formed on the second substrate opposite to the first substrate so as to run perpendicular to the electrodes Y
1
to Yn and X. The common electrodes X are formed in proximities of the scanning electrodes Y
1
to Yn in correspondence with them and commonly connected at terminals on one side.
The common terminal of the common electrodes X is connected to the output terminal of an X-side circuit
2
. The scanning electrodes Y
1
to Yn are connected to the output terminals of a Y-side circuit
3
. The address electrodes A
1
to Am are connected to the output terminals of an address-side circuit
4
. The X-side circuit
2
is formed from a circuit for repeating discharge. The Y-side circuit
3
is formed from a circuit for executing line-sequential scanning and a circuit for repeating discharge. The address-side circuit
4
is formed from a circuit for selecting a column to be displayed.
The X-side circuit
2
, Y-side circuit
3
, and address-side circuit
4
are controlled by control signals supplied from a drive control circuit
5
. That is, a cell to be turned on is determined by the address-side circuit
4
and the line-sequential scanning circuit in the Y-side circuit
3
, and discharge is repeated by the X-side circuit
2
and Y-side circuit
3
, thereby performing the display operation of the PDP.
The drive control circuit
5
generates the control signals on the basis of display data D from an external device, a clock CLK indicating the read timing of the display data D, a horizontal sync signal HS, and a vertical sync signal VS and supplies the control signals to the X-side circuit
2
, Y-side circuit
3
, and address-side circuit
4
.
FIG. 18A
is a sectional view of a cell Cij as a pixel, which is in the ith row and jth column. Referring to
FIG. 18A
, the common electrode X and the scanning electrode Yi are formed on a front glass substrate
11
. The electrodes X and Yi are coated with a dielectric layer
12
that insulates the electrodes from discharge space
17
. The dielectric layer
12
is coated with an MgO (magnesium oxide) protective film
13
.
On the other hand, the address electrode Aj is formed on a back glass substrate
14
opposite to the front glass substrate
11
. The address electrode Aj is coated with a dielectric layer
15
, and the dielectric layer
15
is coated with a phosphor
18
. Ne+Xe Penning gas is sealed in the discharge space
17
between the MgO protective film
13
and the dielectric layer
15
.
FIG. 18B
is a view for explaining the capacitance Cp in the AC-driven PDP. As shown in
FIG. 18B
, in the AC-driven PDP, capacitive components Ca, Cb, and Cc are present in the discharge space
17
, between the common electrode X and the scanning electrode Y, and in the front glass substrate
11
, respectively. A capacitance Cpcell per cell is determined by the sum of the capacitive components (Cpcell=Ca+Cb+Cc). The sum of capacitances Cpcell of all the cells in the panel is the panel capacitance Cp.
FIG. 18C
is a view for explaining light emission of an AC-driven PDP. As shown in
FIG. 18C
, striped-shaped red, blue, and green phosphors
18
are laid out and applied to the inner surface of ribs
16
. The phosphors
18
are excited by discharge between the common electrode X and the scanning electrode Y so as to emit light.
In addition, a method for driving an AC-driven PDP has been suggested. The method employs a drive circuit as shown in
FIG. 19
to apply a positive potential to one electrode and a negative potential to the other electrode, thereby making use of a potential difference between the electrodes to perform discharge therebetween.
FIG. 19
is a circuit diagram showing the arrangement of a drive circuit for an AC-driven PDP.
Referring to
FIG. 19
, a capacitive load
20
(hereinafter referred to as a “load”) is the total capacitance of the cells formed between one common electrode X and one scanning electrode Y. The common electrode X and the scanning electrode Y are formed on the load
20
. Here, the scanning electrode Y is a given scanning electrode of the scanning electrodes Y
1
to Yn.
On the common electrode X side, switches SW
1
and SW
2
are connected in series between the ground (GND) and a power supply line for a potential (Vs/2) supplied from a power supply (not shown). One terminal of a capacitor C
1
is connected to an interconnection node between the two switches SW
1
and SW
2
, while a switch SW
3
is connected between the other terminal of the capacitor C
1
and the GND.
Switches SW
4
and SW
5
are connected in series between the two terminals of the capacitor C
1
. An interconnection node between the two switches SW
4
and SW
5
is connected on the way to the common electrode X of the load
20
via an output line OUTC and to a power recovery circuit
21
as well. Furthermore, a switch SW
6
having a resistor R
1
is connected between a second signal line OUTB and a power supply line for generating a write potential Vw.
The power recovery circuit
21
has two coils L
1
and L
2
connected to the load
20
, a diode D
2
and a transistor Tr
1
that are connected in series to the coil L
1
, and a diode D
3
and a transistor Tr
2
that are connected in series to the coil L
2
. The power recovery circuit
21
also has a capacitor C
2
to be connected between the interconnection node of the two transistors Tr
1
and Tr
2
and the second signal line OUTB.
Thus, the load
20
and the coils L
1
and L
2
each connected thereto constitute two resonant circuits. That is, the power recovery circuit
21
is provided with two L-C resonant circuits in which charges supplied to the panel by the resonance of the coil L
1
and the load
20
are recovered through the resonance of the coil L
2
and the load
20
.
On the scanning electrode Y side, switches SW
1
′
Kishi Tomokatsu
Onozawa Makoto
Sakamoto Tetsuya
Tomio Shigetoshi
Fujitsu Hitachi Plasma Display Limited
Liang Regina
Staas & Halsey , LLP
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