Pre-erase manufacturing method

Semiconductor device manufacturing: process – Repair or restoration

Reexamination Certificate

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Reexamination Certificate

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06800493

ABSTRACT:

BACKGROUND OF THE INVENTION
Production of structures on a die section of a wafer typically involves plasma or reactive ion etching. These and other anisotropic etching methods are among production steps that can result in a charge accumulation. Charge accumulation can cause unstable device characteristics and low yield, particularly for non-volatile memories. Conventionally, exposure to UV radiation before division of the wafer into dies has been used to relieve the charge accumulation. Exposure to UV radiation is not a universal remedy, as some memory structures and materials accumulate charges, instead of relieving them, when exposed to UV.
Accordingly, an opportunity arises to devise methods that relieve charge accumulation from structures on the die sections of a wafer, during manufacturing, without UV exposure.
SUMMARY OF THE INVENTION
The present invention includes methods to pre-erase non-volatile memory cells using an electrical erase signal prior to dividing a wafer into dies. Particular aspects of the present invention are described in the claims, specification and drawings.


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patent: 2001/0026970 (2001-10-01), Eitan et al.
patent: 1096505 (2001-05-01), None
Mori et al., “Reliability Study of Thin Inter-poly Dielectrics for Non-volatile Memory Application”, 1990 IEEE, Reliability Physics Symposium, 28thAnnual Proceedings., International, pp. 132-144.

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