Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2000-05-05
2004-10-12
Kang, Donghee (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S014000, C257S017000, C257S022000, C257S023000, C257S104000, C257S106000, C438S330000, C438S979000, C438S983000
Reexamination Certificate
active
06803598
ABSTRACT:
BACKGROUND OF THE INVENTION
The present application has Government rights assigned to the National Science Foundation under contract numbers ECS-9622134 and ECS-9624160, and assigned to DARPA/AFOSR under contract number F49620-96-C-0006.
A. Field of the Invention
The present invention relates generally to interband tunneling diodes, and, more particularly to Si-based resonant interband tunneling diodes and a method of making interband tunneling diodes.
B. Description of the Related Art
The purpose of this invention is the development of a tunnel diode exhibiting negative differential resistance (NDR) at room temperature on a Si platform. It has been demonstrated that tunnel diode/transistor logic, realized to date only in III-V material systems, enhances any transistor technology [1,2] by reducing the number of components per circuit function, increasing speed, and lowering power consumption. As an example of how tunnel diodes are beneficial, a tunneling static random access memory (T-SRAM) [3,4] exhibits reduced power consumption with a concurrent area reduction as compared to conventional static random access memory (SRAM) or dynamic random access memory (DRAM) cells. Depending on the circuit considered, one of three different performance gains or a combination thereof may be expected: (i) increased circuit speed, (ii) reduced circuit component counts/footprint areas, or (iii) reduced power dissipation.
With the exception of Si Esaki diodes fabricated by alloying during the 1960's, there have been very few reports of Si tunneling structures since that time. The Esaki diodes were studied extensively until the mid-1960's, setting a PVCR standard of 3.8 [5] which was only recently surpassed by Duschl et al. [6-7].
Advances in non-equilibrium epitaxial processing techniques such as molecular beam epitaxy (MBE) in the 1970's lead to the development of III-V-based resonant tunneling diodes (RTD) [8,9], establishing a renewed interest for augmenting existing circuitry with tunnel diodes. Tunneling in an RTD occurs when the energy of electrons at the electrode coincides with the energy level of confined states in a quantum well such that energy and momentum are conserved. This condition is known as resonance.
However, an n-type RTD is not particularly feasible to build in Si. A number of groups in the early 1990's investigated Si/SiGe RTDs based on hole transport, but the results were marginal [10,11] at room temperature. Ismail et al. attempted to circumvent this problem by growing the tunnel diodes on a relaxed SiGe layer [12]. This valiant attempt to develop a working RTD, however, only produced a PVCR of only 1.2 at room temperature.
In the late 1980's the resonant interband tunnel diode (RITD), a hybrid between Esaki diodes and RTDs, was first proposed by Sweeny and Xu [13]. The standard RITD is a bipolar device with quantum wells defined on opposite sides of a tunnel barrier in both the p and n type regions. As the device is forward biased, the electron states in the n-side quantum well and hole states in the p side quantum well are in resonance, and the current increases. As the device is biased beyond the peak voltage, the states are no longer in resonance, and NDR will occur. If the wells are deep enough to allow for multiple states, it is theoretically possible to observe the presence of a weak second NDR region. As with the Esaki diode, once the device is biased beyond the built-in potential, the current will increase due to the onset of diffusion current. Also, for a standard double quantum well p-n RITD, NDR will only be observed under forward bias.
Sweeny and Xu suggested a number of methods for defining quantum wells in an RITD [13]. One type of device uses narrow gap materials to define a type I heterojunction double quantum well. Reports of double quantum well RITDs using InAlAs/InGaAs have demonstrated PVCRs as high as 144, the highest of any existing tunnel diode technology to date [14]. A second device uses type II heterojunctions to define the quantum well. One example of this structure is an InAs/AlSb/GaSb RITD. Since the conduction band of InAs lies below the valence band of GaSb, quantum wells may be formed without high doping. Carriers would then tunnel from confined states between the InAs/InSb conduction band well. The use of a double barrier has been shown to enhance the PVCR [14,15] experimentally.
A third device, which is essentially a hybrid between an Esaki diode and an RTD, incorporates &dgr;-doping planes on either side of the p-n junction to define the quantum states for the majority carrier. This device will be the template of choice for the experimental work in the invention. III-V RITDs incorporating this structure have demonstrated PVCRs as high as 5.0 [16].
To achieve &dgr;-doping requires careful control of surface segregation and interdiffusion effects to exceed the solid solubility limit of many dopants. Surface segregation is a phenomenon that occurs when the number of impurities arriving at the substrate during growth exceed the equilibrium solid solubility at the surface leading to a buildup of impurities on the growth surface. Doping in Si-MBE at growth temperatures greater than 450° C. is well known to suffer from surface segregation [17]. A number of studies in the 1980s/1990s have demonstrated the occurrence of this phenomenon in Si for common p-type dopants (Ga [18], In [19], and B [20]) as well as for the n-type dopant Sb [21]. A region of doping impurities contained within a two dimensional plane of the epitaxial layer is known as a &dgr;-doping plane of dopants.
Essentially, the growth of a &dgr;-doping plane is nothing more than a stop growth. Schubert outlines the following 3 steps to the realization of a &dgr;-doping layer [22]: (i) suspend epitaxial growth, (ii) allow a flux consisting only of dopants to impinge on the semiconductor surface, and (iii) resume growth of the epitaxial layer. In the idealized case where the sticking coefficient is nearly unity, and very little diffusion or segregation occurs, the dopants will be confined to the atomic plane.
In reality, the growth of a &dgr;-doping layer is kinetically limited. Phenomena such as segregation and diffusion will result in undesirable broadening of the &dgr;-doping planes. Schubert defines a true &dgr;-doping plane to be a spike with a full width at half maximum less than 2.5 nm [22]. The key to achieving such a profile is suppressing segregation and diffusion by removing the energy required to make these phenomena favorable. The low temperature growth techniques described earlier were shown to do just this, and will therefore be useful for the realization of &dgr;-doping planes. A possibility for controlling doping profiles is reducing segregation and diffusion, two kinetically mediated phenomena. Since both segregation and diffusion rely on the substrate temperature, a possibility for suppressing these mechanisms is to reduce the growth temperature until neither mechanism is probable. Growth at reduced temperatures, however, will almost certainly produce films of increased defect densities.
The first approach to growing abrupt &dgr;-doping profiles to show promise among the Si community was solid phase epitaxy (SPE). In SPE, growth takes place at room temperature. This leads to two results: monotonically abrupt doping profiles and an amorphous epitaxial layer. All segregation is suppressed, as is in-situ diffusion. A post growth anneal is performed to re-crystallize the layer. One problem with SPE is that electrical activity falls below unity, particularly for Sb [23]. This implies that some Sb species have clustered during growth into complexes that act as defect sites. Since the undesirable excess current component of tunnel diodes is believed to be defect mediated, highly defected growth is unacceptable for tunnel diode growth.
While low te
Berger Paul R.
Hobart Karl
Lake Roger
Rommel Sean L.
Thompson Phillip E.
Kang Donghee
University of Delaware
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