Digital programmable, spread spectrum clock generator

Details Digital programmable, spread spectrum clock generator Digital programmable, spread spectrum clock generator

2000-09-12

2004-02-24

Corrielus, Jean B. (Department: 2631)

Pulse or digital communications

Spread spectrum

C327S291000

Reexamination Certificate

active

06697416

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates to the implementation of a digital, programmable, spread spectrum clock generator that produces a clock signal with a defined lower spectral density for reduced electromagnetic interference with very low noise and jitter.
BACKGROUND OF THE INVENTION
Today's electronic products exhibit higher and higher performance as new, particularly digital, technology is brought to bear on both consumer and business problems. As the products become faster and more complex, the amount of radiated emissions in the form of electromagnetic interference (EMI) increases. Processors of one type or another are frequently a part of electronic appliances and equipment. Whether the processor is a microprocessor (&mgr;P), a digital signal processor (DSP), or a microcontroller (&mgr;C), each requires one or more clock signals for synchronization.
The performance of equipment using these processors is increasing very rapidly, and currently, state-of-the-art equipment like high-end personal computers (PCs) use processors with 200 MHz performance and above. For this type equipment, clock rates of 60-100 MHz are required. However, clock rates of &mgr;Ps in even the 30-40 MHz range are common today in digital electronic equipment.
In the United States, the Federal Communications Commission (FCC) sets and enforces maximum satisfactory EMI levels. These regulations are becoming even stricter with new requirements expected above 1 GHz. In Germany, the Verband Deutscher Elektrotechniker (VDE) sets EMI limits. The balance of the world follows the emission standards set by the Comite International Special Des Pertabations Radioelectriques (CISPR). It is necessary for the electronic equipment manufacturer to meet these standards, in order to be able to sell into markets governed by these bodies.
In order to comply with government limits on EMI emissions, several methods have been used to minimize EMI levels. Shielding, careful routing of signal traces, slowing clock rise and fall times and filtering are common ways of reducing the EMI of electronic equipment. However, each has problems of cost, space required and the engineering time involved.
“Spread Spectrum” (SS), crystal controlled oscillators have proven to be an effective solution for providing a reliable clock with reduced emissions for current and new high performance electronic equipment. The spread spectrum technique intentionally “broadbands” a signal which is normally narrow band, spreading the energy contained within the signal over a wider bandwidth. A frequency domain representation of a narrow band input clock signal without modulation and a “spread” wide band output clock signal with modulation is shown in FIG.
1
. See U.S. Pat. No. 5,491,458, entitled “APPARATUS FOR SPREADING THE SPECTRUM OF A SIGNAL AND METHOD THEREFOR,” which issued on Feb. 13, 1996, for discussion of a phase modulator for spreading the spectrum of radiated emission of a clock signal.
Spread spectrum oscillators use a phase-locked-loop (PLL) technology to obtain wide deviation and crystal accuracy at frequencies as high as 135 MHz. Frequency modulation (FM) is used to spread the clock signal. For a discussion of this approach, see “Spread Spectrum Clock Generation for the Reduction of Radiated Emissions,” by Hardin, Feebler & Bush, pages 227-231, 1994
IEEE International Symposium on Electromagnetic Compatibility
, Catalog # 94CH3347-2, ISDN 0-7803-1398-4. EMI is reduced at the center frequency by “spreading” the bandwidth of the clock signal, effectively reducing the measured EMI at a given frequency. It should be noted that the total radiated energy, i.e., EMI, remains the same, but is “spread” over a wider bandwidth than the original narrow band signal.
There are several ways to achieve spectral dispersion, or spread spectrum, of a signal. Both frequency and phase modulation are used. However, where low jitter is required, frequency modulation offers the preferred solution. For electronic equipment, there are two commonly used techniques that use frequency modulation for spread spectrum oscillators to reduce EMI without degrading the clock performance: 1) divider modulation, and 2) direct modulation of the voltage controlled oscillator (VOL.). Both techniques use a PLL and produce a frequency modulated clock.
Both of these techniques use PLLs which will be described only briefly herein, since they are well known to those in the art. The PLL is a circuit which synchronizes the output signal with reference to the input signal in frequency as well as phase. A more detailed description of the PLL can be found in “The Linear PLL,” by Roland E. Best, Chapter 2, Phase-Locked Loops: Design, Simulation and Applications, McGraw-Hill, 3rd Edition, 1997.
A functional block diagram of a spread spectrum clock generator (SSCG) showing the two techniques mentioned above, for comparison
A functional block diagram of a spread spectrum clock generator (SSCG) showing the two techniques mentioned above, for comparison purposes, is shown in FIG.
2
. Both techniques use a VOL.
13
. In both techniques a clock input
10
is provided to an input of a phase detector (PD)
11
. The output of the phase detector
11
is provided to a loop filter (F)
12
. In the first technique the output of the loop filter
12
is provided to a VOL.
13
. In the second technique, the output of the loop filter
12
is provided to a summer
14
, the other input of the summer
14
being the output of a frequency modulator
15
, which provides a varying voltage corresponding to the frequency modulation of the VOL.
13
, with the output of the summer
14
being provided to the input to the VOL.
13
. In both cases, the output of the VOL.
13
is the output of the SSCG and is provided to the input of a divider (DIV)
16
, and the output of the divider
16
is provided to the other input of the phase detector
11
. However, in the second technique, a frequency modulator
17
modulates the output frequency of the divider
16
. The PD
11
compares the frequency and phase of the input clock waveform with the output waveform from the VOL.
13
and generates an error signal, in the form of a series of pulses indicating whether the feedback signal lags or leads the reference input signal, and having a width proportional to the phase difference between the two signals.
The F
12
then filters the unwanted harmonics from the PD error signal and integrates the voltage level of the input signal. The resulting output signal then goes to the VOL.
13
as a control voltage. The VOL.
13
control voltage is repeatedly adjusted with positive or negative signals until the output of the VOL.
13
is aligned with the input clock signal. The VOL.
13
is set to oscillate at a given frequency, depending on the output clock frequency required by the system. Where this frequency is greater than the input or reference frequency, the PLL
9
appears to multiply the frequency to the output. When this is the case, a divider is required in the feedback circuit from the VCO output to the PD in order to reduce the frequency back to that of the original input signal.
Thus, the two common prior art electronic techniques of modulating the signal to achieve a SSCG output from the PLL and the reduced emissions are 1) SSCG using PLL and Frequency Modulation and Summing of the VCO input signal, and 2) SSCG using PLL and Frequency Modulation of the Divider. A more detailed description of the first of these two techniques can be found in U.S. Pat. No. 5,488,627, entitled “SPREAD SPECTRUM CLOCK GENERATOR AND ASSOCIATED METHOD,” and which issued on Jan. 30, 1996. This technique is referred to hereinafter as the Direct Modulation of the VCO (DIR. MOD.) approach.
A more detailed description of the second of these two techniques can be found in an article entitled “Frequency Modulation of System Clocks for EMI Reduction,” by Cornelis D. Hoekstra, Article 13, pages 1-7, Hewlett-Packard Journal, August 1997. This technique is referred to hereinafter as the Divider Modulation (DIV. MOD.) approach.
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