Coded data generation or conversion – Converter compensation
Reexamination Certificate
2004-01-09
2004-10-12
Young, Brian (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S120000
Reexamination Certificate
active
06803867
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a DC compensation circuit, and in particular to a circuit compensating DC offset from a direct conversion receiver.
2. Description of the Related Art
In wireless communication products, conventional receivers utilize superheterodyne technique, requiring not only costly discrete devices but also application of external signal conversion. Superheterodyne receivers convert RF signals from all channels into IF signals by means of an external signal filter, and apply the IF signals to a local OSC and an external Voltage Control Oscillator (VCO) for conversion to baseband signals, raising costs and limiting yield. Therefore, direct conversion techniques, with lower power consumption and better suitability for multimedia systems, are widely used in receivers, omitting the need for IF signals conversion.
FIG. 1
is a block diagram of a typical direct conversion receiver, comprising a wireless receiver device
11
, a mixer
13
, a local OSC
15
, a preamplifier
12
, and a post-amplifier
14
. As shown in
FIG. 1
, amplifier
12
amplifies RF signals from device
11
, and mixer
13
mixes the amplified RF signals with those from local OSC
15
to generate baseband signals (converting RF signal to baseband directly). The amplifier
14
then amplifies the base-band signals for output through the terminal (out) to a device (not shown). Ideally, the converted local OSC frequency equals that of received RF signals RF signals
21
received by device
11
can thus be converted into baseband signals
22
, as shown in FIG.
2
.
In practice, leakage signals generated by local OSC
15
feed into the input end (not shown) of mixer
13
by radiation or substrate coupling, with resulting IF DC offset. Due to the local OSC signals being stronger than received RF signals, the resulting IF DC offset signals are also much stronger than the received RF signals. During amplification, the IF DC offset causes the amplifier
14
to enter a saturated state, limiting function. As well, asymmetry caused by circuit layout and manufacture through high-gain amplifiers generates DC offset.
Conventional direct conversion receivers comprise a DC offset compensation circuit. As shown in
FIG. 4
, most DC offset compensation circuits
40
connect to post-amplifier
14
to generate DC compensation and prevent distortion of output signals.
In communication theory, DC offset compensation circuit
40
can be treated as a one-stage high pass equivalent circuit, as shown in
FIG. 5
, if cutoff frequency of the circuit is 5 Khz and RC response time is 200 &mgr;s, resistance R=1M , and the capacitor C=100 pF. A solution using additional DC feedback circuits is disclosed in U.S. Pat. No. 5,430,765, which is poorly integrated and unable to combine the DC circuit into a single chip. Another solution integrates a function generator and offset adjustment circuit, as disclosed in U.S. Pat. No. 6,006,079. Unfortunately, high integration in this method results in 2 more complicated circuit with longer hopping time, requiring more baseband resources to adjust DC offset, an unsuitable method for hopping systems, in addition to the high cost.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a DC offset compensation circuit for direct conversion receivers using capacitors and a plurality of active devices.
Another object of the invention is to provide a compensation circuit to compensate both static DC offset and dynamic offset in two steps. The present invention with short hopping time is suitable for frequency hopping systems such as Global System for Mobile communication (GSM).
The present invention provides a DC offset compensation circuit for use with direct conversion receivers with low terminating frequency and high-pass response generated by capacitors and active devices. The capacitors and active devices described can be integrated into a single chip.
REFERENCES:
patent: 6317064 (2001-11-01), Ferrer et al.
patent: 6642868 (2003-11-01), Brown et al.
Industrial Technology Research Institute
Lauture Joseph
Thomas Kayden Horstemeyer & Risley
Young Brian
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