Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2000-10-24
2004-02-03
Cuneo, Kamand (Department: 2829)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S099000, C438S396000
Reexamination Certificate
active
06686211
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a technique for manufacturing non-volatile memory devices and non-volatile memory devices and semiconductor apparatuses manufactured thereby, and more particularly to an improved technique of a ferroelectric process.
TECHNICAL BACKGROUND
FIG. 8
shows a cross-sectional structure of a 1T1C (1 transistor+1 capacitor) type non-volatile ferroelectric memory device with a stacked type cell structure. Referring to the figure, a semiconductor substrate
1
is formed with a cell transistor
17
that is mainly composed of a gate electrode
2
, a source region
3
and a drain region
4
, and a device element isolation insulation film
5
. The cell transistor
17
that forms each memory cell is connected to a ferroelectric capacitor
18
through an interlayer insulation film
6
. The ferroelectric capacitor
18
is composed of a lower electrode
7
, a ferroelectric film
19
and an upper electrode
9
, wherein the ferroelectric film
19
is formed from a PZT ferroelectric material, a SBT ferroelectric material or the like. The lower electrode
7
connects to the drain region
4
through a contact hole that is opened in the interlayer insulation film
6
, and the upper electrode
9
connects to a plate line
20
through a contact hole that is opened in an interlayer insulation film
21
. Also, the gate electrode
2
connects to a word line, and the source region
3
connects to a bit line.
When the non-volatile ferroelectric memory device having the structure describe above is manufactured, for example, as described in Japanese laid-open patent application HEI 7-335840 and Japanese laid-open patent application HEI 11-214626, the cell transistor
17
is formed on the semiconductor substrate
1
using a semiconductor process, and then the ferroelectric capacitor
18
to be connected to the cell transistor
17
is formed using a ferroelectric process such as the Sol-Gel method. A film forming method for the ferroelectric film
19
using the Sol-Gel method is described in detail in
Ferroelectrics
, Voll. 116, pp79-93 “Recent Result on Switching, Fatigue and Electrical Characterization of Sol-Gel based PZT Capacitors”.
It is noted that, in the present specification, a ferroelectric process refers to a process for forming a capacitor insulation film composed of, for example, a PZT or SBT ferroelectric material and the like that is used for a ferroelectric capacitor, as well as a film such as an organic thin film that can undergo a polarization inversion by an external electric field.
However, when the non-volatile ferroelectric memory device having a multiple-layered structure is manufactured by the above-described method, the cell transistor
17
is formed in a lower layer, and then the ferroelectric capacitor
18
is formed above in an upper layer. Accordingly, a problem has been pointed out that the ferroelectric film
19
that is formed from an oxide develops an oxygen deficiency by a reducing atmosphere, and therefore deterioration of its characteristics occurs.
The characteristic deterioration due to the oxygen deficiency of the ferroelectric capacitor
18
can be restored by a heat treatment conducted under an oxygen atmosphere at temperatures of 550° C.~600° C. However, a heat treatment cannot be conducted after a process of wiring a low melting-point metal such as aluminum. Furthermore, although PZT based materials are often used for ferroelectric films, non-volatile memory devices may preferably be manufactured with a material that does not contain zinc, in consideration of the pollution of the process line by diffusion of zinc in the manufacturing process.
Accordingly, it is an object of the present invention to provide a method for manufacturing a non-volatile memory device with a ferroelectric process that conforms with a semiconductor process for forming cell transistors.
DESCRIPTION OF THE INVENTION
To solve the problems described above, in accordance with the present invention, when a non-volatile memory device having a ferroelectric capacitor that is formed from an organic thin film capable of a polarization inversion by an external electric field provided between a lower electrode and an upper electrode is manufactured, a material solution for the organic thin film is coated on the lower electrode, and is solidified to thereby form an organic thin film. According to this method, the film forming temperature of the organic thin film becomes to be lower than 150° C.~200° C., which does not cause damages to cell transistors, and therefore a ferroelectric process that conforms with a semiconductor process is provided.
The material solution for the organic thin film may preferably include, for example, a material solution containing a copolymer of vinylidene fluoride and trifluoroethylene dissolved in a solvent. An ink jet type recording head may be used to coat the material solution for the organic thin film on the lower electrode, with the result that a highly accurate patterning can be performed.
Also, in accordance with the present invention, a material solution that contains fine particles of the upper electrode may be coated on the organic thin film and solidified to thereby form an upper electrode. In this case, an ink jet type recording head may be used to coat the material solution for the upper electrode, with the result that patterning and film formation of the upper electrode can be simultaneously conducted with a high level of precision.
Also, in accordance with the present invention, partitioning members to partition lower electrodes provided in respective memory cells may be formed, and the material solution for the organic thin film may be filled over the lower electrodes that are partitioned by the partitioning members and solidified to thereby form the organic thin film. In accordance with this method, cross talks between the memory cells accompanied with a higher integration of memory devices can be prevented.
In the manufacturing method described above, an upper layer of the partitioning member may preferably be formed with a material that does not have an affinity for the material solution for the organic thin film. By such a structure, the material solution for the organic thin film can be readily coated. The material with non-affinity may preferably include, for example, polyimide, amorphous silicon, polysilicon or an organic compound including fluorine.
REFERENCES:
patent: 4860254 (1989-08-01), Pott et al.
patent: 5416042 (1995-05-01), Beach et al.
patent: 6087196 (2000-07-01), Sturm et al.
patent: 6198151 (2001-03-01), Wada
patent: 6335206 (2002-01-01), Nishimura
patent: 7335840 (1995-12-01), None
patent: 115474 (1999-02-01), None
patent: 11214626 (1999-08-01), None
patent: 9912170 (1999-03-01), None
patent: 9938203 (1999-07-01), None
Yamauchi N., “A Metal-Insulator-Semiconductor (MIS) Device Using a Ferroelectric Polymer Thin Film in the Gate Insulator”, Jap. J. Appl. Phys., vol. 25(4), p. 590-594(1986).*
Date et al., “Opto-Ferroelectric memeories Using Vinylidene Fluoride”, IEEE Trans. Electr. Insul., vol. 24(3) p. 537-540 (1989).*
Date M., “Ferroelectric Optical memory”, Plast. Eng., vol. 28, p. 771-789 (1995).*
Hayes et al., “Micro-Jet printing of Polymers for Electronics manufacturing”, Proc. Intl. Conf. Adhes. Joining Coat. Technology, Electron. Manuf., p. 168-173, IEEE, N. Y., 1998.*
Bao et al., “Printable Organic and Polymeric Semiconducting Materials and Devices”, J. master. Chem., vol. 9, p. 1895-1904 (1999).*
Melnick et al., “Recent Results on Switching, Fatigue and Electrical Characterization of Sol-Gei Based PZT Capacitors,”Ferroelectrics, 1991, vol. 116, pp. 79-93.
Cuneo Kamand
Konrad Raynes & Victor & Mann LLP
Raynes Alan S.
Sarkar Asok Kumar
Seiko Epson Corporation
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