Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-08-02
2004-10-26
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S909000, C438S943000
Reexamination Certificate
active
06809035
ABSTRACT:
BACKGROUND
1. Field of Invention
The present invention relates to semiconductor processing, and more particularly to method and apparatus for rapid thermal processing of semiconductor substrates.
2. Related Art
The advances in fabrication processes, especially of semiconductor devices of decreased dimensions, have necessitated the development of new processing and manufacturing techniques. One such processing technique is known as Rapid Thermal Processing (RTP), which reduces the amount of time that a semiconductor device is exposed to high temperatures during processing.
In RTP of semiconductor substrates, substrates are exposed to a high temperature environment for a precise amount of time. Most RTP systems use high intensity lamps (usually tungsten-halogen lamps or arc lamps) to heat the substrates within a cold wall furnace. Lamps are used as the energy source because of their low thermal mass, which makes it easy to power them up and down very quickly. The RTP technique, typically includes irradiating the semiconductor substrate or wafer with sufficient power to quickly raise the temperature of the wafer and hold it at that temperature for a time long enough to successfully perform a fabrication process, but which avoids such problems as unwanted dopant diffusion that could otherwise occur at the high processing temperatures.
Unfortunately, conventional lamp-based RTP systems have considerable drawbacks with regard to uniform temperature distribution. Any single variation in the power output from the lamps can adversely affect the temperature distribution across the wafer. In addition, because most lamp-based systems use lamps with filaments, the wafer usually needs to be rotated to ensure that the temperature non-uniformity due to the filament array is not transferred to the wafer during exposure. The moving parts required to rotate the wafer, add to the cost and complexity of the system.
Another particularly troublesome area for maintaining uniform temperature distribution is at the outer edges of the wafer. Most conventional RTP systems have no adequate means to adjust for this type of temperature non-uniformity. As a result, transient temperature fluctuations occur which may cause the formation of slip dislocations in the wafer at high temperatures (e.g. about 1000° C.).
Lamp RTP systems, generally, make repeatability of uniform processing difficult. In most cases, temperature non-uniformities appear near the substrate edges because of the increased surface area. The non-uniformity may produce crystal slip lines on the substrates, particularly near the edges. Temperature non-uniformities may also cause the formation of non-uniform material properties, such as non-uniform alloy content, grain size, and dopant concentration. Non-uniform material properties may degrade the circuitry and decrease yield.
SUMMARY
The present invention provides a processor, having a process chamber, which includes a stable heat source in the form of a heatable mass. Heat is provided to the heatable mass using a heat source, such as a series of heating elements. To avoid contamination of the process that can occur from the use of heating elements, each heating element may be contained in a clear quartz tube. Each quartz tube can be, made to heat the heatable mass to a desired stable temperature. The temperature of the heatable mass establishes the temperature of a semiconductor wafer placed in contact or in close proximity to the heatable mass.
To reduce thermal gradients, the heatable mass can be surrounded with a thermal insulator, which forms an insulative compartment made of an insulating material, such as opaque quartz and the like. The top of the insulative compartment can include an access portion to allow the semiconductor wafer to be placed on the heatable mass disposed therein.
An opening is provided on the process chamber for loading and unloading of wafers to and from the process chamber. A gate valve can be used to seal the opening, if necessary. The gate opens and closes to allow a robotic transport arm to deliver wafers from a supply, to the process chamber. The gate also opens and closes to allow the robotic transport arm to remove treated wafers from the process chamber. Optionally, the top of the process chamber can be provided with a cooling means so as to effectuate a temperature differential between the heatable mass and the top portion of the process chamber.
The heatable mass can include a wafer support mechanism, movably extends through the base of the process chamber and through the heatable mass. The wafer support mechanism can be used to receive a wafer for processing and then move the wafer to a position on or near the heatable mass for heating. After processing, the wafer support mechanism can move the wafer to a position away from the heatable mass to allow the wafer to cool before it is removed from the process chamber. The wafer support mechanism may take the form of a set of lift pins that extend through conduits or holes formed in the heatable mass.
The heatable mass may include a wafer receptacle, which is formed as an indentation on the working surface of the heatable mass. The wafer receptacle is of a slightly larger dimension than the outer dimension of the wafer to allow the wafer to have surface engaging contact with the heatable mass if desired, which helps maintain the uniformity of the temperature across the diameter of the wafer during processing and along the edges of the wafer.
Optionally, the wafer may be further exposed during heating to a very high intensity radiation energy source for a short duration of time, also referred to as a “flash” process. The flash process can be used to raise the temperature of the active layer of the wafer surface beyond the steady-state temperature of the bulk of the wafer body. Thus the flash process is advantageous for implant anneal applications, such as shallow junction, ultra shallow junction, and source drain anneal. The flash process may also be used effectively for thermal donor annihilation, re-crystallization, and impurity doping.
In one aspect of the invention, a thermal processing system is provided including a process chamber which defines an internal cavity. Disposed within the internal cavity is an insulative compartment including a heatable mass. The insulative compartment also includes an access portion provided to allow a semiconductor wafer to be placed proximate to the heatable mass. The system also includes a wafer support mechanism configured to receive the semiconductor wafer and move the semiconductor wafer from between a first position where the semiconductor wafer is proximate to the heatable mass within the insulative compartment and a second position where the semiconductor wafer is distant from the heatable mass outside of the insulative compartment.
In another aspect of the present invention, a thermal processing system is provided including a process chamber having insulating materials and walls and a window, which together define an internal cavity. Within the internal cavity is disposed an insulative compartment including a heatable mass. The insulative compartment further includes an access portion provided thereon configured to receive a semiconductor wafer therethrough. A wafer support mechanism is included in the system and is configured to receive the semiconductor wafer and move the semiconductor wafer from between a first position where the semiconductor wafer is proximate to the heatable mass within the insulative processing area within the chamber and a second position where the semiconductor wafer is distant from the heatable mass outside of the insulative compartment. Further, the system includes a radiation energy source disposed proximate to the window to allow radiation energy to enter the internal cavity and impinge on a surface of the semiconductor wafer.
In yet another aspect of the present invention, a method is provided for thermal processing including providing a process chamber defining an internal cavity; heating a semiconductor wafer by moving the semiconduc
Dang Phuc T.
MacPherson Kwok & Chen & Heid LLP
WaferMasters Inc.
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