Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead
Reexamination Certificate
2003-06-10
2004-08-03
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
C257S762000, C257S737000, C257S735000, C257S758000, C257S765000, C257S787000, C257S792000, C257S793000, C257S700000, C257S713000, C257S738000, C438S127000, C438S112000, C438S108000, C252S514000
Reexamination Certificate
active
06770971
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2002-173700, filed Jun. 14, 2002; and No. 2002-326304, filed Nov. 11, 2002, the entire contents of both of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having an encapsulating layer for covering a distributing line and a method of fabricating the same.
2. Description of the Related Art
FIG. 36
shows an example of a semiconductor device called a CSP (Chip Size Package). This semiconductor device has a silicon substrate
104
. A plurality of connecting pads
105
made of aluminum are formed on a peripheral portion of the upper surface of the silicon substrate
104
. A silicon oxide insulating layer
106
is formed on the connecting pads
105
except for their central portions and on the upper surface of the silicon substrate
104
, and a polyimide protective layer
108
is formed on the insulating layer
106
. The central portions of the connecting pads
105
are exposed through holes
107
formed in the insulating layer
106
and protective layer
108
.
Distributing lines
110
are formed from the upper surfaces of the connecting pads
105
exposed through the holes
107
to predetermined portions of the upper surface of the protective layer
108
. Each distributing line
110
is made up of a metal undercoating
110
a
and an upper metal layer
110
b
which is formed on the upper surface of the metal undercoating
110
a
and made of copper. Columnar electrodes
111
made of copper are formed on the upper surfaces of pad portions at the ends of the distributing lines
110
. On the upper surfaces of the protective layer
108
and the distributing lines
110
, an encapsulating layer
117
made of an organic resin such as an epoxy-based resin is formed such that the upper surface of the encapsulating layer
117
is leveled with the upper surfaces of the columnar electrodes
111
. Solder balls
119
are formed on the upper surfaces of the columnar electrodes
111
.
In the above conventional semiconductor device, the encapsulating layer
117
is adhered to that upper surface of the protective layer
108
, which is not covered with the distributing lines
110
, to the surfaces of the distributing lines
110
, and to the outer surfaces of the columnar electrodes
119
. The above-mentioned conventional reference describes that the distributing lines
110
and columnar electrodes
111
are made of copper, and the encapsulating layer
117
is formed by an organic resin such as an epoxy-based resin. As will be described later, a pressure cooker test reveals that the adhesion between the encapsulating layer
117
made of an organic resin such as an epoxy-based resin and the copper distributing lines
110
and copper columnar electrodes
111
is not necessarily satisfactory. If the adhesion between the encapsulating layer
117
and the distributing lines
110
and columnar electrodes
111
is insufficient, the encapsulating layer
117
easily peels off from the surfaces of the distributing lines
110
and the outer surfaces of the columnar electrodes
111
, resulting in an unsatisfactory encapsulating effect.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device and a method of fabricating the same by which the adhesion between an encapsulating layer and the surface of a distributing line and between the encapsulating layer and the outer surface of a columnar electrode increases.
According to an aspect of the present invention, there is provided a semiconductor device comprising
a semiconductor structure including a semiconductor substrate having an integrated circuit portion, and a plurality of connecting pads connected to the integrated circuit portion,
a plurality of distributing lines formed on the semiconductor structure, electrically connected to the connecting pads, and having connecting pad portions, and
an encapsulating layer made of a resin, and formed on the semiconductor structure and upper surfaces of the distributing lines,
wherein a copper oxide layer is formed on a surface of each of the distributing lines except for at least the connecting pad portions.
According to another aspect of the present invention, there is provided a fabrication method of a semiconductor device comprising
preparing a semiconductor structure including a semiconductor substrate having an integrated circuit portion, and a plurality of connecting pads connected to the integrated circuit portion,
forming, on the semiconductor structure, a plurality of distributing lines connected to the connecting pads and having connecting pad portions,
forming a copper oxide layer on a surface except for at least the connecting pad portions of the distributing lines, and
forming an encapsulating layer made of a resin on the semiconductor structure including upper surfaces of the distributing lines.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
REFERENCES:
patent: 6338893 (2002-01-01), Kodera et al.
patent: 6372158 (2002-04-01), Hashimoto et al.
patent: 6501169 (2002-12-01), Aoki et al.
patent: 2002/0158345 (2002-10-01), Hedler et al.
patent: 2002/0191406 (2002-12-01), Hashitani et al.
Kouno Ichiro
Okada Osamu
Casio Computer Co. Ltd.
Frishauf Holtz Goodman & Chick P.C.
Keshavan B V
Smith Matthew
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