Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
2001-12-27
2004-04-20
Phu, Phoung (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S150000, C708S426000
Reexamination Certificate
active
06724838
ABSTRACT:
I. RELATED APPLICATIONS
This application relates to an application by the same inventors entitled “A Low Complexity Correlator for Multi-code CDMA” filed on the same date as this application, and incorporated herein by reference.
II. BACKGROUND OF THE INVENTION
This invention relates generally to despreaders, and more particularly to a dual-code despreader that can despread pseudonoise (PN) sequences used for Code Division Multiple Access (CDMA) systems.
The growing importance of wireless communications has increased the demand for data transmission over mobile radio channels. Although GSM standards have become very popular and data service specifications are developing, most current mobile communications still use CDMA technologies. Future multimedia transmission, however, will require wide bandwidths and high data rates, which in turn will require complex and expensive hardware.
CDMA systems use a PN sequence to “spread” input data to resist data loss in a noisy wireless environment. The transmitted baseband signal is expressed as
S
T
=
∑
i
bi
[
j
]
Ci
,
(
1
)
where b
i
[j], a scalar value representing the jth bit of user i, is +1 or −1, and C
i
, a column vector representing the PN code sequence, also has entries of either +1 or −1. The baseband signals are then summed and transmitted.
Receivers must despread the received signal back into an original input symbol by correlating the received signal with the same PN code C
k
used to spread the signal as follows:
b
k
[k]=
sign(
C
k
T
S
R
) (2)
The Sign function outputs a 1 if the input is positive and a −1 if the input is negative.
Generally,
S
R
=S
T
+n
(3)
where n represents the noise from the environment. Combining equations (1), (2), and (3) yields:
b
k
[
k
]
=
sign
[
C
k
T
S
T
+
n
]
,
=
sign
[
C
k
T
∑
i
(
bi
[
j
]
C
i
+
n
)
]
=
sign
[
b
k
[
j
]
C
k
T
C
k
+
∑
i
≠
k
(
biC
k
T
C
i
+
C
k
T
n
)
]
(
4
)
For orthogonal codes,
C
k
T
C
i≈
0, if
i≠k
(5)
Also, noise n is small compared with an original signal, and
C
k
T
C
k
=m
(6)
where m is the spreading factor.
Because b
k
[j] is either 1 or −1,
b
k
[j]≈
sign(
b
k
[j]m
)=
b
k
[j]
(7)
In addition to the noise signal, other user data can be regarded as another source of interference for CDMA systems.
Modern CDMA systems use either different orthogonal codes or the same code with different delays. This requires hardware that can despread several codes concurrently. Some researchers have tried to increase throughput by adding two PN sequences as the code input, with the two sequences coming from the same code with different delays.
Another system to reduce power consumption uses sign-magnitude data format and two accumulators for positive and negative partial sums, respectively, with a specialized architecture. None of these systems, however, provides a complete solution to future problems facing CDMA systems.
III. SUMMARY OF THE INVENTION
A method, consistent with this invention, of despreading an input signal spread with two original codes, comprises forming two new multi-element codes from the two original codes such that only one of the corresponding elements of each code is zero, combining the new codes with the input signal, and combining the partial results to form correlation values. Combining the new codes involves forming partial results for each of the new codes, and updating, for each element, the partial result corresponding to the new code for which the corresponding element is not zero.
A system, consistent with this invention, for despreading an input signal spread with two original codes involves forming two new multi-element codes from the two original codes such that only one of the corresponding elements of each code is zero. The apparatus comprises first adder means for combining the new codes with the input signal, and adder subtractor means for combining the partial results to form correlation values. The first adder means includes means for forming partial results for each of the new codes, and means for updating, for each element, the partial result corresponding to the new code for which the corresponding element is not zero.
A dual-code correlator, consistent with this invention, is coupled to an input signal and a pair of multi-element codes designed such that only one of the corresponding elements of each code is zero, and comprises a decoder element receiving the input signal and the codes, an adder coupled to the output of the decoder element and a register bank containing partial results, and an adder/subtractor circuit to form correlation results from the partial results.
Another dual code correlator, consistent with this invention, is coupled to an input signal and a pair of multi-element codes designed such that only one of the corresponding elements of each code is zero, and comprises an adder circuit receiving the input signal and a partial result, a register bank containing a plurality of partial results, steering circuits for directing the output of the adder circuit to the register circuit and for directing the appropriate one of the partial results to the adder circuit, and an adder/subtractor circuit to form correlation results from the partial results.
A matched filter, consistent with this invention, comprises a plurality of filter stages connected sequentially, and an adder/subtractor circuit connected to the outputs of the last of the filter stages in the sequence for forming the filter output. Each of the stages includes an adder receiving an input signal and an output from a previous stage, the first of the stages in the sequence receiving a fixed input, and a register bank to hold the output of the adder as an output of that stage.
Both the foregoing general description and the following detailed description are exemplary and do not restrict the invention claimed. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate systems and methods consistent with the invention and, together with the description, explain the principles of the invention.
REFERENCES:
patent: 4518947 (1985-05-01), Poston et al.
patent: 5216693 (1993-06-01), Nakamura
patent: 5754604 (1998-05-01), Li et al.
patent: 5930292 (1999-07-01), Willis
patent: 6370208 (2002-04-01), Kuo et al.
Kuo Fu-Yen
Wei-Ku Chung
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Industrial Technology Research Institute
Phu Phoung
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