Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-08-14
2004-03-02
Talbott, David L. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S264000, C361S795000
Reexamination Certificate
active
06700071
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a multi-layer circuit board with at least two or more layers of circuit patterns connected, and a method of manufacturing same.
BACKGOUND OF THE INVENTION
With a recent trend of electronic equipment becoming more miniaturized and higher in component density, there is an increasing demand for multi-layered circuit boards in the fields of both industrial and home-use equipment.
In the field of such multi-layer circuit board, there is a strong demand for the development of a method of making inner via-hole connection between multi-layered circuit patterns, and a circuit board having a highly reliable structure. As a method of manufacturing such circuit board, Japanese Laid-open Patent No. 6-268345 is proposing a method of manufacturing a high density circuit board having a novel structure wherein inner via-hole connections are made by conductive paste. This conventional method of manufacturing a circuit board will be described in the following.
A method of manufacturing a circuit board having four layers as a prior art multi-layer circuit board is described in the following.
First, a method of manufacturing a double-side circuit board being the base for a multi-layer circuit board is described.
FIG. 7
is a sectional view of the process for a conventional method of manufacturing double-side circuit boards for inner layers. In
FIG. 7
, the substrate is formed of prepreg sheet
21
. The prepreg sheet
21
has a shape of 250 mm sq. and about 150 &mgr;m thick. For example, the prepreg sheet
21
is formed of a composite material having non-woven fabric made from aromatic polyamide fiber and thermosetting epoxy resin impregnated to the non-woven fabric. Releasing films
22
a
,
22
b
have a plastic film and a Si type releasing agent applied to one side of the film, and the releasing films
22
a
,
22
b
are about 16 &mgr;m in thickness. For example, as plastic film, polyethylene terephthalate is employed.
A method of bonding the prepreg
21
and releasing film
22
a
,
22
b
together is disclosed in Japanese Laid-open Patent No. 7-106760. Japanese Laid-open Patent No. 7-106760 refers to a method of continuously bonding releasing films
22
a
,
22
b
by dissolving the resin component of prepreg
21
with the use of a laminating apparatus.
A through-hole
23
is formed in the pregreg sheet
21
and releasing films
22
a
,
22
b
bonded together. The through-hole
23
is filled with conductive paste
24
. Metallic foils
25
a
,
25
b
such as copper of 18 &mgr;m thick are bonded to either side of the prepreg sheet
21
. The conductive paste
24
is electrically connected to the metallic foil
25
a,
25
b.
In FIG.
7
,(
a
) the releasing films
22
a
,
22
b
are bonded to either side of the prepreg sheet
21
. Next, (b) the through-holes
23
are formed, at predetermined portions, in the prepreg sheet
21
with the releasing films
22
a
,
22
b
bonded thereto, by using a laser beam machining process.
Next, (c) the conductive paste
24
is filled into the through-holes
23
. In the method of filling the conductive paste
24
, the prepreg sheet
21
having the through-holes
23
is placed on the table of a printer (not shown) and the conductive paste
24
is directly printed on the releasing film
22
a
. In this case, the releasing films
22
a
,
22
b
serve a function as a printing mask and also a function to prevent contamination of the prepreg sheet
21
.
Subsequently, (d) the releasing films
22
a
,
22
b
are removed from either side of the prepreg sheet
21
.
Next, (e) the metallic foils
25
a
,
25
b
are laminated to either side of the prepreg sheet
21
. And the laminated metallic foils
25
a
,
25
b
and prepreg sheet
21
are heated under pressures at a temperature of about 200° C. and pressure of about 4 MPa for one hour in a vacuum.
In this way, (f) the prepreg sheet
21
is compressed and becomes reduced in thickness (t
2
) to approximately 100 &mgr;m. At the same time, the prepreg sheet
21
and metallic foils
25
a
,
25
b
are bonded to each other. Further, the metallic foil
25
a
disposed on the surface side and the metallic foil
25
b
disposed on the back side are electrically connected to each other by the conductive paste
24
filled in the through-holes
23
formed at the predetermined positions.
After that, the metallic foils
25
a
,
25
b
are selectively etched, and then circuit patterns
31
a
,
31
b
are formed respectively on either side thereof. Thus, a double-side circuit board can be obtained.
FIG. 8
is a sectional view of the process for a conventional method of manufacturing a multi-layer circuit board, and the multi-layer circuit board is a four-layer circuit board.
In FIG.
8
(
a
), a double-side circuit board
40
having circuit patterns
31
a
,
31
b
manufactured by the steps from (a) to (g) of FIG.
4
and prepreg sheets
21
a
,
21
b
with conductive paste
24
filled in through-holes
23
manufactured by the steps from (a) to (d) of
FIG. 7
are prepared.
Next, as shown in FIG.
8
(
b
), metallic foil
25
b
, prepreg sheet
21
b
, inner layer double-side circuit board
40
, prepreg sheet
21
a
, and metallic foil
25
a
are positioned and laminated in this order.
Subsequently, the laminated board formed of these is heated under pressures at a temperature of about 200° C. and pressure of about 4 MPa for one hour in a vacuum, thereby curing the prepreg sheets
21
a
,
21
b
. Thus, as shown in FIG.
8
(
c
), the prepreg sheets
21
a
,
21
b
are compressed and become reduced in thickness (t
2
) to 100 &mgr;m, then the double-side circuit board
40
and metallic foils
25
a
,
25
b
are bonded to each other. The circuit pattern
31
a
and circuit pattern
31
b
of the double-side circuit board
40
are connected to the metallic foils
25
a
,
25
b
by inner via-holes filled with conductive paste
24
. Next, as shown in FIG.
8
(
d
), the metallic foils
25
a
,
25
b
are selectively etched, thereby forming the circuit patterns
32
a
,
32
b
. In this way, a circuit board having four layers can be obtained.
However, in the above conventional method of manufacturing a circuit board, a prepreg sheet formed of half-cured resin are heated under pressures to bond the prepreg sheet to a metallic foil and also to harden the prepreg sheet. In this case, during heating under pressures, a cushion is generally used as an intermediate material to compensate for variation in thickness of the prepreg sheet. However, due to variation in quantity and fluidity of the resin contained in the prepreg sheet, the peripheral resin excessively flows during heating under pressures, resulting in insufficient application of the pressure to the central portion of the substrate, and accordingly, the conductive paste will not be sufficiently compressed. As a result, there has been a problem of fluctuation in connection resistance.
SUMMARY OF THE INVENTION
A multi-layer circuit board of the present invention comprises:
(a) a double-side circuit board including a first substrate, a plurality of first through conductors disposed in the first substrate, bonding layers disposed on either side of the first substrate, and a first circuit pattern and a second circuit pattern disposed on the surface of the bonding layer,
wherein the first circuit pattern and the second circuit pattern are electrically connected to each other by the first through conductors;
(b) an intermediate substrate including a second substrate, a plurality of second through conductors disposed in the second substrate, and a first bonding layer and a second bonding layer disposed on either side of the second substrate,
wherein the first bonding layer and the second bonding layer are disposed on either side of the substrate except the second through conductors, and
the intermediate substrate is disposed on the surface of at least one of the first circuit pattern and the second circuit pattern.
By the above configuration, the through conductors disposed between the respective circuit patterns become uniform in connection resistance, and consequently, a circuit bo
Kishimoto Kunio
Komoda Hideaki
Nakamura Shinji
Nishii Toshihiro
Takenaka Toshiaki
Alcala José H.
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
Talbott David L.
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