Semiconductor wafer

Details Semiconductor wafer Semiconductor wafer

2002-10-10

2004-03-09

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

With measuring or testing

C438S013000, C438S015000

Reexamination Certificate

active

06703251

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor wafer, and more particularly to a semiconductor wafer on which a plurality of IC chips isolated by scribe lines from one another and a plurality of inspection pads are formed.
Inspection pads for inspecting operations of IC chips formed on a semiconductor wafer are sometimes formed in the IC chips, respectively.
FIG. 4
shows a part of a semiconductor wafer on which IC chips each having such an inspection pad are formed. Plural IC chips
42
are formed on the semiconductor wafer
41
, and isolated by scribe lines
43
from one another. This semiconductor wafer
41
is cut by cutting the scribe lines
43
away therefrom after predetermined processing. Consequently, the IC chips
42
are separated from one another.
Each of the IC chips
42
has an inspection pad
44
connected to an internal circuit. This inspection pad
44
is used in an inspection step. To inspect an operation of the internal circuit of each of the IC chips, a predetermined voltage is applied to this inspection pad. Alternatively, a predetermined electric current is supplied to the internal circuit so as to detect a change in voltage of this inspection pad
44
. Thus, it is inspected whether or not the internal circuit of the IC chip
42
properly operates. Additionally, a protection device for preventing electrostatic breakdown may be provided between the inspection pad
44
and the internal circuit so as to prevent electrostatic breakdown of the internal circuit from occurring owing to application of an unexpected voltage, which is caused by static electricity at such an inspection, to the inspection pad
44
and due to inflow of an overcurrent to the internal circuit.
The inspection pads
44
and the protection devices respectively provided therein are necessary only in the inspection step. Upon completion of the inspection step, the inspection pads
44
and the protection devices are not used. In recent years, there have been demands for reducing the size of the IC chip. However, because the inspection pad and the protection device occupy a certain area when provided in the IC chip, it is difficult to reduce the size of the IC chip. Consequently, there have been problems in that the maximum number of IC chips, which can be formed on a semiconductor wafer, is limited to a relatively small value and that production efficiency is not increased.
SUMMARY OF THE INVENTION
The invention is accomplished in view of the aforementioned problems. Accordingly, an object of the invention is to provide a semiconductor wafer that has inspection pads needed in an inspection step and that achieves reduction in size of IC chips.
In order to achieve the above object, according to the present invention, there is provided a semiconductor wafer, comprising:
a wafer substrate;
a plurality of IC chips mounted on the wafer substrate, each of the IC chips having an internal circuit;
a plurality of scribe lines formed on the wafer substrate for separating the IC chips from one another; and
a plurality of inspection pads formed on the scribe lines, each of the inspection pads being connected to the associated internal circuit via a conduction path for inspecting an operation of the associated IC chip.
The necessity for providing an inspection pad in each of the IC chips is eliminated by forming the inspection pads on the scribe lines. The inspection pads formed on the scribe lines are cut away together with the scribe lines from the semiconductor wafer in a cutting step. Thus, the reduction in size of IC chips is achieved. Consequently, the maximum number of IC chips, which can be formed on a semiconductor wafer, is increased. Moreover, the productivity in producing IC chips is increased.
Preferably, the semiconductor wafer further comprises a plurality of protection devices formed on the scribe lines, each of the protection devices being connected to the associated inspection pad and the associated internal circuit for preventing an overcurrent from being supplied to the internal circuit.
Each of the protection devices is implemented by, for example, a diode, whose anode is grounded. The provision of such a protection device prevents an overcurrent from flowing into the internal circuit of the associated IC chip. Thus, the internal circuit is prevented from being broken. The reduction in size of IC chips can be achieved by forming the protection devices together with the inspection pads on the scribe lines.
Preferably, the conduction path is made of polysilicon. Some semiconductor wafers have a drawback in that aluminum wirings may short-circuit wafer substrates in the cutting step. However, in the above configuration, such a problem can be eliminated.
According to the present invention, there is also provided a method of manufacturing a plurality of IC chips each having an internal circuit, comprising the steps of:
providing a wafer substrate on which the IC chips and a plurality of inspection pads each connected to the associated internal circuit via a conduction path are mounted, the IC chips being separated from one another by a plurality of scribe lines, the inspection pads being formed on the scribe lines;
inspecting an operation of each IC pad through the associated inspection pad; and
cutting away the scribe lines after the inspection step.
Preferably, the manufacturing method further comprises the step of cutting a part of the conduction path after the inspection step is carried out and before the scribe lines are cut away.


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