Single-seed wide-swing current mirror

Details Single-seed wide-swing current mirror Single-seed wide-swing current mirror

2002-05-06

2004-01-20

Riley, Shawn (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

Reexamination Certificate

active

06680605

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to current mirror circuits.
FIG. 1
shows a conventional wide-swing current mirror circuit as used in analog IC design using CMOS transistors. A pair of series connected transistors and form one leg of the current mirror. The other leg is formed by transistors
14
and
16
which are also in series and have their gates connected to transistors
10
and
12
, respectively. The current I flowing through transistors
14
and
16
will be mirrored by the current flowing through transistors
10
and
12
. A first seed current from a current source
18
is provided through a diode-connected transistor
20
to establish a bias voltage for transistor
14
. A second seed current from a second current source
22
feeds through a diode-connected transistor pair
14
and
16
to create a gate-source voltage for transistor
16
. The transistor sizes are designed in such a way that the source of transistor
14
is at a voltage just enough to bias the drain of transistor
16
(node
24
) at the knee of saturation without going into the triode region. Transistors
10
and
12
have corresponding transistor sizes to transistors
14
and
16
, respectively. Thus, they produce a mirrored output current I
0
.
FIG. 2
shows a similar circuit to
FIG. 1
, but implemented with PFET transistors, rather than the NFET transistors of FIG.
1
.
The designs of
FIGS. 1 and 2
have the disadvantage of requiring two different current sources, which can become problematic if a significant number of current mirrors need to be implemented on a semiconductor chip. The extra current sources consume not only chip space, but also power.
BRIEF SUMMARY OF THE INVENTION
The present invention provides a current mirror circuit that uses only a single seed current, and thus only a single current'source. A transistor biasing circuit is connected in between the single current source and the two transistors of the first leg of the current mirror. The transistor biasing circuit provides two functions. First, the seed current itself flows through the transistors of the transistor biasing circuit to the two transistors forming the first leg of the current mirror. Second, the transistor biasing circuit biases the gates of the transistors in the current mirror so that the output transistors are at the beginning of saturation.
In one embodiment, two transistors are used for the biasing circuit. One is connected between the current source and the gates of the first pair of current mirror transistors. The other is connected: between the gates of the first pair of current mirror transistors and the gates of the second pair of current mirror transistors. The two biasing transistors are sized so that they form a ratio which will maintain the desired biasing point over variations in the seed current.


REFERENCES:
patent: 4471292 (1984-09-01), Schenck et al.
patent: 4550284 (1985-10-01), Sooch
patent: 5966005 (1999-10-01), Fujimori

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