Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2001-02-22
2004-03-09
Tugbang, A. Dexter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S846000, C029S831000, C029S852000, C216S018000, C216S041000, C216S052000, C216S013000, C205S118000, C205S222000, C205S220000
Reexamination Certificate
active
06701613
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer circuit board and a method of manufacturing the multilayer circuit board, more precisely relates to a multilayer circuit board, in which cable patterns can be highly precisely formed and high density wiring can be realized, and a method of manufacturing this multilayer circuit board.
In a multilayer circuit board, e.g., a printed circuit board, a plurality of cable layers are piled, on an organic core board with insulating layers, which electrically insulates the piled cable layers. Cable patterns in the different cable layers are electrically connected by vias. A conventional multilayer circuit board is shown in FIG.
11
. In
FIG. 11
, cable patterns
14
are piled on a surface of a core board
10
with insulating layers
12
. The cable patterns
14
in different cable layers are mutually connected by vias
16
. Each via
16
is formed by the steps of: boring a via hole in the insulating layer
12
; and plating an inner face of the via hole and a surface of the insulating layer
12
. By the vias
16
, the cable patterns
14
in the different layers can be electrically connected with each other. The cable patterns
14
in each layer are formed by the steps of: forming an electric conductive layer on a surface of the insulating layer
12
by plating; and etching the electric conductive layer. Namely, the multilayer circuit board, which includes the piled cable patterns
14
, is manufactured by forming the vias
16
and the cable patterns
14
in each insulating layer
12
.
To precisely form the cable patterns with higher density, the core board is made of a ceramic and the cable layers (the cable patterns) are made thinner. The ceramic multilayer circuit board has good quality but manufacturing cost must be higher. Therefore, a multilayer circuit board, whose core board is an organic board and which has functions equal to the ceramic multilayer circuit board, is required.
Unlike the ceramic board, flatness of the organic board is lower, and the organic board is easily deformed, so the multilayer circuit board including the organic core board has following disadvantages.
In the case of forming the via holes in the insulating layer by laser means or photolithography, it is difficult to precisely form the small-sized via holes if thickness of the inslulating layer is uneven and the surface of the core board is not flat. By the uneven thickness of the insulating layer and the waved surface of the core board, focusing accuracy of the patterns are made lower and the vias having prescribed size cannot be formed by laser means or photolithography. Further, diameters of an opening section and a bottom section of the vias are changed if the thickness of the insulating layer is uneven.
If the thickness of the insulating layer is uneven, aspect ratio of the via holes in the insulating layer are not fixed. In the case of plating the inner face of the via hole, plating property is highly influenced by the aspect ratio of the via hole. Therefore, reliability of the vias, which electrically connect the cable patterns in the different layers, must be lower.
As shown in
FIG. 11
, in the conventional multilayer circuit board, the vias
16
in the adjacent layers are electrically connected by land pads
18
and arranged like a zigzag form. By arranging the vias
16
in the zigzag form, extra spaces for arranging the vias
16
are required, so that spaces for arranging the cable patterns
14
must be narrower. With the narrow arranging spaces, the cable patterns
14
cannot be formed with higher density.
The surface of the insulating layer
12
, in which the cable patterns
14
are formed, is laminated with a plastic film or coated with a resin after the cable patterns
14
are formed. By covering the cable patterns
14
with the insulating layer
12
, the surface of the insulating layer
12
is waved, so that the flatness of the surface of the insulating layer
12
must be badly influenced. In the case of forming the cable patterns
14
by etching the electric conductive layer on the insulating layer
12
, the waved surface of the insulating layer
12
makes accuracy of the cable patterns
14
lower because patterning accuracy of the photolithography, in which a photosensitive resist layer on the surface of the electric conductive layer is patterned, is badly influenced.
The cable patterns
14
and the vias
16
are constituted by electric conductive materials plated. In the case of plating a large-sized circuit board, it is difficult to make thickness of the plated layer (the electric conductive layer) even, so that thickness of the plated layer is different at portions in the board. By the uneven thickness of the electric conductive layer or the cable patterns
14
, the flatness of the surface of the insulating layer
20
is made lower. Therefore, it is difficult to precisely form the cable patterns with higher accuracy.
Unlike the multiylayer circuit board shown in
FIG. 11
, some multiylayer circuit boards have post vias, which are capable of electrically connecting cable patterns in different layers, instead of the vias, which are formed by filling the via holes with plated metal. The multiylayer circuit board having the post vias is manufactured by the steps of: forming cable patterns and land pads; setting post vias at the land pads; covering the cable patterns, the land pads and the post vias with an insulating layer; and abrading a waved surface of the insulating layer, which is waved by the cable patterns, the post vias, etc., so as to expose upper end faces of the post vias and make the surface of the insulating layer flat (see U.S. Pat. No. 5,916,453). In this method, it is difficult to make the surface of the insulating layer highly flat and it is also difficult to form highly minute cable patterns if thickness of the cable patterns and height of the post vias are not fixed.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a multilayer circuit board, in which the cable patterns in a plurality of cable layers can be precisely formed and the cable layer are formed with higher density, with higher reliability.
Another object of the present invention is to provide a method of manufacturing the multilayer circuit board.
To achieve the object, the multilayer circuit board of the present invention comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between said electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer, wherein height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
The multilayer circuit board may further comprise a second insulating layer, which is formed to enclose the post vias, wherein height of the post vias are equal to that of the second insulating layer.
The method of manufacturing a multilayer circuit board of the present invention comprises the steps of: forming a plurality of cable layers, each of which includes electric conductive sections; forming a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer; and forming post vias, which electrically connect the electric conductive sections in one cable layer to those in another cable layer, wherein the electric conductive sections of each cable layer are formed by the steps of: forming a first electric conductive layer; forming a first resist layer, whose thickness is equal to that of the electric conductive sections to be formed, on a surface of the first electric conductive layer; etching the first resist layer so as to expose parts of the first electric conductive layer corresponding to the electric conductive sections to be formed; and executing electrolytic plating on the exposed parts of th
Armstrong Kratz Quintos Hanson & Brooks, LLP
Nguyen Tai
Tugbang A. Dexter
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