Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask
Reexamination Certificate
2002-10-21
2004-10-26
Rosasco, S. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Radiation modifying product or process of making
Radiation mask
Reexamination Certificate
active
06808850
ABSTRACT:
BACKGROUND
1. Field of the Invention
The invention relates to the process of fabricating semiconductor chips. More specifically, the invention relates to a method and an apparatus for performing optical proximity correction (OPC) on selected trim-level segments that do not abut features to be printed on the integrated circuit.
2. Related Art
Recent advances in integrated circuit technology have largely been accomplished by decreasing the feature size of circuit elements on a semiconductor chip. As the feature size of these circuit elements continues to decrease, circuit designers are forced to deal with problems that arise as a consequence of the optical lithography process that is typically used to manufacture integrated circuits. This optical lithography process begins with the formation of a photoresist layer on the surface of a semiconductor wafer. A mask composed of opaque regions, which are generally formed of chrome, and light-transmissive clear regions, which are generally formed of quartz, is then positioned over this photoresist layer. (Note that the term “mask” as used in this specification is meant to include the term “reticle.”) Light is then shone on the mask from a visible light source, an ultraviolet light source, or more generally some other type of electromagnetic radiation together with suitably adapted masks and lithography equipment.
This light is reduced and focused through an optical system containing a number of lenses, filters and mirrors. The light passes through the clear regions of the mask and exposes the underlying photoresist layer. At the same time, the light is blocked by opaque regions of the mask, leaving underlying portions of the photoresist layer unexposed.
The exposed photoresist layer is then developed, through chemical removal of either the exposed or non-exposed regions of the photoresist layer. The end result is a semiconductor wafer with a photoresist layer having a desired pattern. This pattern can then be used for etching underlying regions of the wafer.
Phase Shifting
As feature sizes continue to decrease, phase shifters are often incorporated into masks to achieve line widths that are smaller than the wavelength of the light that is used to expose the photoresist layer. During phase shifting, destructive interference caused by two adjacent clear areas on a phase shifting mask (PSM) is used to create an unexposed area on the photoresist layer. This is accomplished by exploiting the fact that light passing through a mask's clear regions has a phase that is a function of the distance the light travels through the mask material. By placing two clear areas adjacent to each other on the mask, one of thickness t
1
and the other of thickness t
2
, one can obtain a desired unexposed area on the underlying photoresist layer caused by destructive interference. By varying the thickness t
1
and the thickness t
2
appropriately, the light exiting the material of thickness t
2
is 180 degrees out of phase with the light exiting the material of thickness t
1
. Phase shifting is described in more detail in U.S. Pat. No. 5,858,580, entitled “Phase Shifting Circuit Manufacture Method and Apparatus,” by inventors Yao-Ting Wang and Yagyensh C. Pati, filed Sep. 17, 1997 and issued Jan. 12, 1999.
Optical Proximity Correction
Optical proximity correction (OPC) is also used to improve printing of a layout. During the OPC process, additional features, such as “hammerheads,” are often added onto features, such as line ends. The goal of OPC is to modify the layout such that the printed image of the modified layout more closely resembles the original layout. More generally, for an original layout T, OPC produces a modified layout T′ such that the printed image of T′ more closely resembles T. Additionally, the term OPC is used generically to refer to all types of proximity correction
In some cases, OPC is applied to both a phase shifting mask as well as a trim mask. In some embodiments, the approach of U.S. patent application Ser. No. 10/082,697 entitled “Optical Proximity Correction For Phase Shifting Photolithographic Masks” having inventors Pierrat et. al., and filed 25 Feb. 2002 are used. For example, the top portion of
FIG. 1
illustrates the use of that approach for a target polysilicon line
104
to be printed using phase shifting. The top portion of
FIG. 1
illustrates the original layout along with one of the phase shifters, phase shifter
102
, which would be located on a dark field alternating aperture phase shifting mask. The phase shifter
102
is placed to abut a portion of the polysilicon line
104
. The bottom portion of
FIG. 1
illustrates a corresponding trim mask
106
that protects the portions of the polysilicon line
104
to being printed with the phase shifting mask and defines the remainder of the line. In the example illustrated in
FIG. 1
, OPC is applied to segments
108
-
110
on the phase shifting mask that abut polysilicon line
104
. (Note that evaluation points for the OPC operation are represented by crosses in
FIG. 1.
) OPC is also applied to segments
111
-
112
on the trim mask
106
that abut polysilicon line
104
. Note also that the example in
FIG. 1
has been highly simplified, to highlight the handling of OPC for phase shifted structures.
Design Process
A brief discussion of where PSM and OPC fit in one common circuit design process may be helpful. Masks to be used in wafer fabrication process are the final result of the design process. The process starts when a circuit designer produces a design in VHDL, or some other hardware description language. VHDL is an acronym for VHSIC Hardware Description Language. (VHSIC is a Department of Defense acronym that stands for very high-speed integrated circuits.) The VHDL standard has been codified in Institute for Electrical and Electronic Engineers (IEEE) standard 1076-1993.
The design then feeds through a layout system that performs a number of functions, such as synthesis, placement and routing and verification. The result is an integrated circuit (IC) layout, which is in the form of a hierarchical specification expressed in a format such as GDSII.
IC layout then passes into PSM and OPC post-processing systems, which can perform PSM conversion and proximity corrections.
The output of PSM and OPC post-processing system is a new IC layout. New IC layout subsequently passes into mask fabrication and inspection processes.
Wafer Fabrication Process
The produced masks can be used in wafer fabrication processes. The system starts by applying a photoresist layer to the top surface of a wafer. Next, the system bakes the photoresist layer. The system then positions the first mask over the photoresist layer, and exposes the photoresist layer through the first mask. Next, the system positions the second mask over the photoresist layer, and then exposes the photoresist layer through the second mask. In one embodiment of the invention, the first mask is a PSM mask and the second mask is a binary trim mask. However, note that the first mask and/or the second mask can include phase shifting regions. Next, the system optionally bakes the wafer again before developing the photoresist layer. Next, either a chemical etching or ion implantation step takes place before the photoresist layer is removed. (Note that in the case of a lift-off process, a deposition can take place.) Finally, a new layer of material can be added and the process can be repeated for the new layer.
Problems in Printing Cutouts
As integration densities continue to increase, it is becoming necessary to use phase shifters to define progressively more features within a layout. In fact, some integrated circuits are beginning to be fabricated using a “full phase” tape out methodology in which substantially all of the features in a layout are defined by phase shifters. However, the widespread use of phase shifters often leads to side-effects. For example, in
FIG. 2
, phase shifters
206
and
208
(which are of opposite phase) are used to define polysilicon regions
202
and
204
. Unfortunately, the phas
Numerical Technologies Inc.
Park Vaughan & Fleming LLP
Rosasco S.
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