Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2003-09-24
2004-10-12
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S540000, C330S288000, C323S315000
Reexamination Certificate
active
06803808
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a current mirror circuit, and more particularly to a low power current mirror circuit.
BACKGROUND OF THE INVENTION
Current mirrors are often used in analog circuits for producing an output current identical to an input current. Generally, a simplest current mirror circuit can be completed only through employing two MOS transistors. However, if it really only employs two MOS transistors for a current mirror circuit, the output current might become unstable while the voltage variation becomes more serious. For overcoming this problem, a conventional method is to employ four MOS transistor to complete the current mirror circuit.
Please refer to
FIG. 1A
which illustrates a conventional current mirror circuit employing four MOS transistors. The current mirror circuit includes a first transistor N
1
, a second transistor N
2
, a third transistor N
3
, a third transistor N
3
, a fourth transistor N
4
, a resistor R, an input current source I
in
, a first power supply V
ss
and a second power supply V
dd
. Meanwhile, the source electrode of the first transistor N
1
and the source electrode of the second transistor N
2
are coupled to the second power supply V
ss
, the gate electrode of the first transistor N
1
, the gate electrode of the second transistor N
2
and the drain electrode of the third transistor N
3
are coupled to a first end of the resistor R, the drain electrode of the fourth transistor N
4
is coupled to the drain electrode of the second transistor N
2
, the gate electrode of the third transistor N
3
, the gate electrode of the fourth transistor N
4
and the second end of the resistor R are coupled to the input current source I
in
and the input current I
in
is coupled to the second power supply V
dd
.
Moreover, the source electrode of the third transistor N
3
is coupled to the drain electrode of the first transistor N
1
and the substrate electrode of the first transistor N
2
, the substrate electrode of the second transistor N
1
, the substrate electrode of the third transistor N
3
and the substrate electrode of the fourth transistor N
4
are coupled to the first power supply V
ss
. Thus, through employing the circuit shown in
FIG. 1A
, an output current I
out
which is identical to the input current source I
in
can be obtained at the output terminal (namely the drain electrode of the fourth transistor N
4
).
Please refer to
FIG. 1B
which illustrates another conventional current mirror circuit employing four MOS transistors. The current mirror circuit also includes a first transistor N
1
, a second transistor N
2
, a third transistor N
3
, a third transistor N
3
, a fourth transistor N
4
, a resistor R, an input current source I
in
, a first power supply V
ss
and a second power supply V
dd
. The difference from the current mirror circuit shown in
FIG. 1A
is the substrate electrode of the third transistor N
3
is coupled to the drain electrode of the third transistor N
3
and the substrate electrode of the fourth transistor N
4
is coupled to the source electrode of the fourth transistor N
4
, and therefore the operating power thereof is lower than that shown in FIG.
1
A.
Although the current source in
FIGS. 1A-B
can generate a larger output impedance so as to avoid the output current I
out
from being interfered by the voltage variation, the method employing four transistors must will increase the operating power of the system. It might be okay under a general operating power (such as 5V), but the information products nowadays always employ low voltages for saving electricity so that there exist a necessity to reduce the operating voltage of the system.
Because of the technical defects described above, the applicant keeps on carving unflaggingly to develop a “low power current mirror circuit” through wholehearted experience and research.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a low power current mirror circuit which allow a low bias gate voltage while maintaining a high output-resistance and output swing range.
It is another object of the present invention to provide a current mirror circuit which employs higher substrate bias voltage than source voltage so as to reduce a threshold voltage and a gate bias voltage due to the body effect.
In accordance with an aspect of the present invention, a current mirror circuit includes a resistor having a first terminal connected to a current source, and a second terminal, a first transistor having a gate electrode connected to the second terminal for receiving a first bias voltage, a source electrode connected to a first power source, and a substrate electrode connected to a drain electrode thereof, a second transistor having a gate electrode connected to the gate electrode of the first transistor, a source electrode connected to the first power source, a substrate electrode connected to the substrate electrode of the first transistor, and a drain electrode, a third transistor having a gate electrode connected to the first terminal of the resistor for receiving a second bias voltage, a source electrode connected to the drain electrode of the first transistor, a substrate electrode connected to the substrate electrode of the first transistor, and a drain electrode connected to the second terminal of the resistor, and a fourth transistor having a gate electrode connected to the gate electrode of the third transistor, a source electrode connected to the drain electrode of the second transistor, and a drain electrode for providing an output current.
Preferably, the current mirror circuit operates under a low bias gate voltage.
Preferably, the first transistor, the second transistor, the third transistor, and the fourth transistor are N-channel metal oxide semiconductor field effect transistors.
Preferably, the first power source is the ground.
Preferably, the current source is connected to a second power source.
The above objects and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed descriptions and accompanying drawings, in which:
REFERENCES:
patent: 5099205 (1992-03-01), Lewyn
patent: 5180967 (1993-01-01), Yamazaki
patent: 6194956 (2001-02-01), Barnes
patent: 6617915 (2003-09-01), Rajan
Lam Tuan T.
Volpe and Koenig P.C.
Winbond Electronics Corp.
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