Solderable flexible adhesive interposer as for an electronic...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S776000, C361S777000

Reexamination Certificate

active

06717819

ABSTRACT:

The present invention relates to a flexible substrate and, in particular, to a flexible substrate including a flexible dielectric adhesive and a flexible conductive adhesive having a low modulus of elasticity.
As semiconductor integrated circuit technology has advanced to greatly increase the amount and operating speed of the circuitry that can be fabricated on a single semiconductor chip, it has become more difficult to effectively utilize such integrated circuits due to the greatly increased number of input and output connections to the chip and the decreasing spacing or pitch of those connections. The connection problem has become more severe where the numbers of connections exceeds that conveniently or economically attainable in a conventional mechanical package.
One approach to solve this problem utilizes semiconductor chips mounted with contacts against and connecting to corresponding contacts on the next-level circuit board, the so-called “flip-chip” mounting, in which the contacts on the next-level circuit board are of substantially the same size and of the same pitch as are those on the semiconductor chip. Problems arise because the pitch of the semiconductor chip connections is much finer than the pitch attainable on conventional mechanical packages and printed wiring circuit boards to which such semiconductor chips are mounted. In addition, differences in thermal expansion between the semiconductor chip and the next-level circuit board produce thermally-induced stress that leads to failure or degradation of the interconnections when exposed to thermal cycling, which stress is often exacerbated by the rigidity of solder interconnections therebetween.
One solution to these problems employs an intermediate substrate between the semiconductor chip and the next-level circuit board to absorb some of the thermally-induced stress, and also to allow the fanning out of the connections to the semiconductor chip to permit a larger contact size and pitch that is compatible with conventional printed wiring circuit board technology. If the intermediate substrate is substantially larger than the size of the semiconductor chip, then the advantage of small chip size is lost, as is the advantage of short electrical lead length that improves the ability to operate the circuit at very high operating frequencies. While this has been addressed by reducing the size of the intermediate substrate and employing next-level substrate technologies capable of finer line widths and smaller features, the rigidity of the intermediate substrate has again posed some difficulties. Electronic packages where the perimeter of the intermediate substrate is no more than about 20% larger than the perimeter of the semiconductor chip mounted thereon are often referred to as “chip scale packages,” although larger packages are often also referred to as “chip scale packages.”
The difficulties of rigid intermediate substrates has been addressed by making the substrates of specialized materials that are referred to as being “flexible,” such as thin polyimide and other so-called “flexible” conventional substrates on which printed wiring conductors and plated through holes can be formed by conventional methods. But, such substrate materials are not truly flexible in that they do not have a low modulus of elasticity, but only flex to a greater extent because they have been made of thinner material having a high modulus of elasticity. Conventional materials, such as polyimide sheet, have a high modulus of elasticity, e.g., a modulus greater than 70,000 kg/cm
2
(1,000,000 psi). In addition, the use of such materials and conventional fabrication methods results in an increased cost that is undesirable and may require assembly processes that are more difficult or expensive to perform.
In addition, enclosed cavity packages are often preferred due to their resistance to the entry of moisture, such as the hermetically-sealed packages usually employed in high reliability, military, aerospace, and medical electronic applications, and in applications of optical devices and frequency-sensitive communication devices. Such packages are generally metal or ceramic with seals formed of glass or metal solders or brazing. The ability of a package to resist the entry of moisture, or to allow the easy exit of moisture, is of importance to reliability of operation. Typically, hermetic type packages are most reliable; lidded packages are less reliable than hermetic packages, but are more reliable than are glob-top, molded or encapsulated packages.
Conventional hermetic cavity type packages are very expensive, due to the metal and/or ceramic package, the slow methods utilized for sealing the rim of the package lid and high labor content. Lidded cavity packages are much less expensive than hermetic packages, but are still expensive as compared to encapsulated packages, such as the molded epoxy or molded plastic encapsulated packages, that are employed in about 95-99% of commercial electronic applications. Even glob-top encapsulated packaging is more expensive than molded packages due to the inherently slow process of dispensing precise amounts of encapsulant, even using precision dispensing equipment. In addition, conductive adhesive connections are unfamiliar to an industry that has long utilized and relied upon solder connections.
Accordingly, there is a need for an electronic substrate or interposer that is suitable for a solder connection, and that avoids some of the technical disadvantage of conventional molded packages without the high cost of conventional hermetic packages. In addition, it would be desirable that such substrate or interposer be suitable for high-density (e.g., chip-scale) packages.
To this end, the interposer of the present invention comprises at least one layer of flexible dielectric adhesive having a modulus of elasticity less than about 35,000 kg/cm
2
(about 500,000 psi) and a plurality of conductive vias through the layer of flexible dielectric adhesive. The plurality of conductive vias are of a flexible electrically conductive adhesive having a modulus of elasticity less than about 35,000 kg/cm
2
(about 500,000 psi) and are in a pattern adapted for connection to contacts of one of an electronic device and a substrate. A solderable electrically conductive metal is formed on at least one exposed surface of the conductive vias and in electrical contact therewith, wherein at least one end of the plurality of conductive vias includes contacts adapted to be soldered to one of an electronic device and a substrate.
According to another aspect of the invention, an electronic package having contacts adapted to be attached to a substrate comprises at least one electronic device having a plurality of contacts thereon, a flexible adhesive interposer having flexible conductive adhesive vias with a solderable metal thereon, and means for connecting the contacts of the electronic device to the conductive vias.
Further, a method for making a solderable flexible adhesive interposer adapted for solder connection to an electronic device comprises:
providing a sheet of metal foil;
providing at least one layer of a flexible dielectric adhesive having a modulus of elasticity less than about 35,000 kg/cm
2
(about 500,000 psi) on one surface of the sheet of metal foil, the layer of flexible dielectric adhesive having a plurality of via openings therein;
providing a plurality of bumps of flexible electrically conductive adhesive having a modulus of elasticity less than about 35,000 kg/cm
2
(about 500,000 psi) on the metal foil at locations of the via openings of said layer of flexible dielectric adhesive, thereby forming conductive vias therein;
patterning the metal foil to form a pattern of contacts electrically connected to the flexible electrically conductive adhesive conductive vias; and
plating a solderable metal on an exposed end of the conductive vias to provide solderable contacts.


REFERENCES:
patent: 5172303 (1992-12-01), Bernardoni et al.
patent: 5286926 (1994-02-01), Kimura et al.
patent: 5296063 (1994-03-01), Yamamura

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