Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2002-01-18
2004-03-16
Pert, Evan (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S256000, C361S792000, C361S780000
Reexamination Certificate
active
06706974
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to the field of printed circuit boards. More particularly, the present invention relates to a method to help provide an improved high frequency current return path through the use of high frequency conductive materials in splits of PCB planes.
BACKGROUND OF THE INVENTION
A printed circuit board (PCB) typically consists of one or more layers of conductive circuitry supported and separated by a dielectric material. Thus, printed circuit boards have outer layers and inner layers. The outer layers of a PCB are usually used for component placement and test pins.
A motherboard, or back plane, is an example of a printed circuit board. Components such as modules, connectors, subassemblies, and other printed circuit boards are often mounted on a motherboard. Interconnections on the motherboard are made utilizing traces on the board. The inner layers of a PCB also have circuitry. Power is supplied to the circuitry using power and ground layers.
The flowchart of a typical PCB manufacturing process of a conducting metal layer is demonstrated in FIG.
1
. Once the process is initiated by operation
100
, a thin conducting metal layer is usually added to the entire wafer surface in operation
110
. The next operation
120
is photolithography. The entire surface of the wafer is covered with a thin film of photoresist during photolithography. Some portions of the wafer are then exposed to ultraviolet light using a photomask which changes the solubility of the underlying photoresist, hardening the photoresist or making it resistant to certain chemicals. During development, the photoresist of the wafer regions not exposed to ultraviolet light is washed away using solvent in operation
130
. The conducting metal layer below is then etched away in operation
140
. Next, the hardened photoresist is stripped away in operation
150
. Finally, the wafer is inspected in operation
160
before the process ends.
A PCB typically consists of layers of fiberglass sheet laminated with etched copper patterns.
FIG. 2
shows an example of a four layer PCB stackup. The four layers consist of signal layers
210
and
270
, power layer
230
, and ground layer
250
. The signal layers
210
and
270
are conductive layers. As previously stated, the power and ground layers
230
and
250
help define the voltages delivered to the components added to the PCB.
A core layer
240
is sandwiched between the power layer
230
and ground layer
250
. Unlike the signal layers
210
and
270
, the core layer
240
is generally an insulating layer of dielectric material with copper adhered to both sides. The copper is used to form conductive circuits. The core material can be rigid or flexible. A prepreg layer
220
exists between the signal layer
210
and the power layer
230
. Similarly a prepreg layer
260
exists between the ground layer
250
and the signal layer
270
. The prepreg layers
220
and
260
, also known as the pre-impregnated layers, consist of the core material impregnated with a synthetic resin partially cured to an intermediate stage. The prepreg layers
220
and
260
are used to bond two materials together. Like the core layer
240
, the prepreg layers
220
and
260
are insulating layers.
The power layer
230
typically contains many splits due to multiple voltage partitions on the plane. The locations of the voltage partitions are known as plane splits or crossing splits. The splits make routing difficult for high-speed signals in adjacent signal layers. The current return path of high-speed signals are typically along the closest planes.
Plane splits create adverse signal integrity (SI) and electro magnetic compatibility (EMC) problems. For example, signals are distorted and crosstalk levels may increase dramatically as a result of plane splits. In addition, emission levels, defined by electro magnetic interference (EMI), has been shown to increase by 10-30 dB.
FIG. 3
depicts simulation results of signal distortions that result from plane splits. The waveform of a single bit signal is shown in waveform
310
. In contrast, odd mode waveform
320
and even mode waveform
330
demonstrate multiple bit signal switching effects. The odd mode waveform
320
is created by switching the odd mode signal 180 degrees out of phase with respect to the other bits in the signal bus. In contrast, the even mode waveform
330
is created by switching the even mode signal in phase with respect to the other bits in the signal bus.
FIG. 4
depicts a plane split
410
that divides the power layer into two sections:
232
and
234
. In order to minimize degradation in performance as a result of the plane split
410
, board designers typically add a stitching capacitor
420
across the plane split
410
or redirect offending traces to another layer, such as ground layer
250
, with decoupling capacitors
430
and
440
. This, however, adds to the routing complexity and to the cost of the board. The number of layers in the board can also be increased to help alleviate the problems associated with plane splits. Similar to adding capacitors, adding board layers will increase the manufacturing cost of the PCB.
REFERENCES:
patent: 5131140 (1992-07-01), Zimmer
patent: 5428506 (1995-06-01), Brown et al.
patent: 5497037 (1996-03-01), Lee et al.
patent: 5587887 (1996-12-01), Price et al.
patent: 5764491 (1998-06-01), Tran
patent: 6058022 (2000-05-01), Gianni et al.
patent: 6349038 (2002-02-01), Hailey
“Welcome to Ohmega Technologies, Inc.,” Ohmega Technologies, Inc. press release. http://www.ohmega.com/.
Chen Juan
Ilavarasan Ponniah
Norman Adam J.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Patel I B
Pert Evan
LandOfFree
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