Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With means to increase breakdown voltage
Reexamination Certificate
2002-08-14
2004-01-13
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
With means to increase breakdown voltage
C257S169000
Reexamination Certificate
active
06677623
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to a bed structure underlying an electrode pad of a semiconductor device and a method for manufacturing the same. More specifically, the invention relates to a bed structure underlying an electrode pad of a semiconductor device, which is manufactured using the element isolation technique, and a method for manufacturing the same.
Referring to
FIGS. 1 through 8
, a semiconductor device having a bed structure underlying a pad electrode, which is formed by embedding an insulation layer in a groove to isolate the adjacent elements from each other, will be described below.
FIG. 1
shows a semiconductor substrate
1
on which active regions
2
are formed by a usual lithography and etching technique. As will be described later, semiconductor devices or the like are formed on the active regions
2
.
FIG. 2
is a plan view of the semiconductor substrate
1
of FIG.
1
.
FIG. 3
is a cross sectional view taken along line A-B of FIG.
2
. In
FIG. 3
, insulator films
3
are embedded in regions other than the active regions
2
(which will be hereinafter referred to as “field regions”). The insulator films
3
serve as element isolating insulator films for isolating the adjacent active regions
2
from each other.
In
FIG. 3
, after semiconductor devices (not shown) are formed on the respective active regions
2
, the element isolating insulator films
3
are formed in grooves around the active regions
2
. In this state, an interlayer insulation layer
4
is deposited as shown in FIG.
4
. Then, a pad electrode
5
is formed on the interlayer insulation layer
4
, and a passivation film
6
is formed thereon. As the above manner, an underlayer structure underlying the pad electrode
5
is formed. Here,
FIG. 4
only shows the structure on the element isolation insulator film
3
.
Then, steps of embedding the element isolation insulator film
3
of, e.g., silicon dioxide, in a predetermined portion formed as a field region, will be described below.
FIG. 5
is a view illustrating a cross section of a region between points E and F of FIG.
2
. First, as shown in
FIG. 5
, a groove
1
a
formed in the semiconductor substrate
1
is filled with silicon dioxide or the like. Thereafter, as shown in
FIG. 6
, the element isolating insulator film
3
is also deposited thereon. The element isolating insulator film
3
is deposited on the whole surface of the semiconductor substrate
1
by the CVD method. Here, if the width W of the groove is large, a recessed portion
11
is formed on the deposited insulator film
3
. The substrate
1
is polished while rotating a polishing member
10
by, e.g., the rotary polishing method. Then, the portion of the insulator film
3
deposited on the upper surface of the substrate
1
is removed, so that the insulator film
3
can be embedded in the region between points E and F.
In addition, if the recessed portion
11
remains in a part of the upper surface of the deposited insulator film
3
in the polishing step, the insulator film
3
can not be evenly polished due to the remaining recessed portion
11
, so that a recessed portion
12
may remain the upper surface of the element isolating insulator film
3
. As a result, it may be difficult to form a pad electrode on the upper surface of the recessed portion
12
in subsequent steps.
Referring to
FIG. 8
, a step of bonding a wire to a pad, which is an example of a bonding step, will be described below.
First, a capillary
7
having a nib shape is pressed against the pad electrode
5
at a predetermined angle, so that a wire
8
is bonded to the pad electrode
5
. At this time, the physical impact applied to the pad electrode
5
damages the interlayer insulator film
4
, the element isolating insulator film
3
and the semiconductor substrate
1
, which are arranged below the pad electrode
5
. In order to prevent such damage, the pad electrode
5
is usually formed on the upperlayer overlying a region, wherein no semiconductor device is formed, i.e., a field region. Therefore, the place for forming the pad electrode
5
is restricted.
As mentioned above, in conventional semiconductor devices, the pad electrode is formed on the layer above the field region in view of the damage applied to the pad electrode in the bonding step. Therefore, there is a problem in that the pad electrode
5
is necessary formed on an upperlayer of the field region in which a semiconductor element is not formed, so that the pad electrode forming place is limited thereto.
In addition, since it is required to surely electrically isolate the field region from the active region adjacent thereto, the area occupied by the field region is considerably greater than the area occupied by the active region. For that reason, as shown in
FIG. 7
, there is a problem in that the insulator film embedded in the element isolating insulator film has a recessed portion.
In order to eliminate such problems, there is provided a method for forming a film, such as a carbon film or a silicon nitride film, which is difficult to be polished, particularly on the recessed portion
11
of the interlayer insulator film
3
of
FIG. 6
so as not to form the recessed portion
12
of
FIG. 7
when polishing. However, according to such a method for forming a film which is difficult to be polished, the number of steps is increased by the step of forming the carbon film or the silicon nitride film, so that there is a problem in that the manufacturing of a semiconductor device is complicated.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to eliminate the aforementioned problems and to provide a semiconductor device and a method for manufacturing the same, wherein the surface of an insulating layer can be more planarized by the rotary polishing method and wherein the bonding damage to the underlayer portion serving as a bed of a semiconductor can be prevented in a bonding step.
In order to accomplish the aforementioned and other objects, according to one aspect of the present invention, there is provided a semiconductor device which comprises: a semiconductor substrate having a surface which has a predetermined pattern, in which an insulating layer is embedded; an interlayer insulator film formed on the substrate, the interlayer insulator film having a protective coat for protecting the substrate; and an electrode formed on the interlayer insulator film.
According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, which comprises the steps of: forming a semiconductor substrate having a surface which has a groove in which an insulating layer is embedded; forming a protective coat for protecting the surface of the semiconductor substrate, on the upper surface of the insulating layer embedded in the groove; and forming an electrode on the protective coat.
With this construction, according to the present invention, it is possible to more sufficiently planarize the surface of the insulating layer by the rotary polishing method. In addition, it is possible to decrease the bonding damage applied to a underlayer portion of the semiconductor device, at which a pad electrode is formed when carrying out the wire bonding. Moreover, it is possible to manufacture a semiconductor having a strength sufficiently resistant to the bonding damage, without increasing the number of the manufacturing steps.
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patent: 5309025 (1994-05-01), Bryant
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Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Le Thao P
Nelms David
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