Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2000-10-25
2004-01-06
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C349S042000
Reexamination Certificate
active
06674093
ABSTRACT:
STATUS RELATING TO THE EARLIER APPLICATIONS
This application is based on the earlier Japanese patent applications No. 11-304683 (filed on Oct. 26, 1999) and No. 2000-308262 (filed on Oct. 6, 2000), the priority thereof under the Paris Convention is claimed. The entire disclosures thereof are incorporated herein by reference thereto.
FIELD OF THE INVENTION
This invention relates generally to an active matrix liquid crystal display device, particularly, to an active matrix substrate and a manufacturing method therefor. More particularly, it relates to a channel protection active matrix substrate in which a gate electrode, a drain electrode and a pixel electrode are isolated from layer to layer and the pixel electrode is formed as the topmost layer, and a manufacturing method therefor.
BACKGROUND OF THE INVENTION
An active matrix liquid crystal display device, employing an active element, such as a thin-film transistor, is thin in thickness and lightweight, and is utilized as a flat panel display of a high picture quality. For a liquid crystal display device, a vertical electrical field system (typically formed as a twisted nematic or TN system) in which a liquid crystal is sandwiched between two substrates carrying transparent electrodes and is driven by a voltage applied across these electrodes, and a lateral (in-plane) electrical field system in which a liquid crystal layer is sandwiched between and driven by comb-shaped pixel electrodes in which the voltage is applied generally along the plane of the electrodes. In both systems, researches are conducted towards simplifying the production process of an active matrix substrate for lowering the production cost. On the other hand, the opening ratio needs to be raised for achieving a high-grade picture. To this end, such a method is used in which a transparent electrode (indium tin oxide or ITO) layer and a drain layer are isolated on the layer basis and the transparent electrode layer is formed as a topmost layer.
In the TN system, a liquid crystal is sandwiched between two substrates each of which is provided with a transparent electrode. In the lateral electrical field system, also called the in-plane switching (IPS) system, a liquid crystal layer is sandwiched between two substrates, each of which is provided with the transparent electrode, with the liquid crystal being driven by a voltage applied generally in-plane across a comb-shaped pixel electrode and a common electrode formed on one of the substrates.
As a manufacturing method in which the transparent electrode layer is formed as the topmost layer to simplify and diminish the number of steps of the production process, a technique shown in JP Patent Kokai JP-A-10-68971 is explained with reference to
FIG. 62
, which is a cross-sectional view for schematically showing the processes of the manufacturing method for an active matrix substrate for use in a TN system liquid crystal display device.
In general, the active matrix substrate of the TN system is comprised of a gate wiring lines and a drain wiring lines extending in a direction perpendicular to each other, a pixel electrode defined in an area surrounded by these wiring lines, and a thin-film transistor (TFT) formed in the vicinity of the intersection of the two wiring lines. On the surface of the TFT is formed a channel protection film for assuring the performance. On the TFT and the pixel electrode on the active matrix substrate, there is formed an orientation film for orienting the liquid crystal in the pre-set direction. A liquid crystal is sealed between the active matrix substrate and a counter substrate carrying a color filter, a common electrode and an orientation film to complete the liquid crystal device.
In this active matrix substrate, a gate electrode metal film of, for example, Cr, is deposited on the transparent insulating substrate
101
, a resist pattern is formed, using a first photomask, and the exposed portion of Cr is etched to form a gate wiring and a gate electrode layer
102
branched from the gate wiring, as shown in FIG.
62
(
a
).
Then, a gate insulating film
103
of SiNx, an a-Si layer
104
, a n
+
type a-Si layer
109
, as an ohmic contact layer, and a drain electrode layer
106
of e.g., Cr, are deposited in succession, after which an unneeded drain electrode layer
106
is selectively etched, in order to form an opening in the channel area of the a-Si layer
104
and a preset wiring pattern, as shown in FIG.
62
(
b
). Then, using the drain electrode layer
106
as an etching mask, the n+type a-Si layer
109
is etched to form an ohmic contact layer.
Then, a second passivation film
107
, such as SiNx, is deposited on the entire substrate surface, and the preset areas of the second passivation film
107
, a-Si layer
104
and the gate insulating film
103
are collectively etched using a third photomask, to separate the thin-film transistor area, as shown in FIG.
62
(
c
).
Then, a contact hole for exposing a source/drain electrode areas is formed, using a fourth photomask, ITO film
108
is deposited on the entire surface of the substrate
101
, and the ITO film
108
in the preset area is removed, using a fifth photomask, to form a pixel electrode connected to the source electrode, to complete the production of the active matrix substrate, as shown in FIG.
62
(
d
).
It is noted that a contact hole exposing the source/drain electrode areas is formed in the second passivation film
107
.
In this conventional active matrix substrate, the ITO film
108
is not provided on the same layer as the source/drain electrode layer
106
, and is insulated and separated by the second passivation film
107
. So, for insulation and isolation of the ITO film
108
from the drain electrode layer
106
, these are not in need of being separated from each other laterally relative to a normal line drawn to the active matrix substrate, and hence these can be made to approach extremely closely to or even overlap with each other. Thus, the black matrix for shielding the uncontrolled back light straying from a gap produced when the ITO film
108
and the source/drain electrode layer
106
are separated from each other can be diminished to elevate the opening ratio. This accounts for insulation and separation of the ITO film
108
and the drain electrode layer
106
from each other by the second passivation film
107
.
It is noted that the ITO film
108
is insulated and separated from each other by the passivation film
107
. In this conventional method for preparing the active matrix substrate, the active matrix substrate can be produced by five masks as the transparent electrode layer is formed as the uppermost layer.
SUMMARY OF THE DISCLOSURE
Various problems have been encountered in the course of investigations toward the present invention.
In the method, shown in the above-mentioned Publication, the gate electrode, drain electrode and the pixel electrode of ITO film are isolated on the layer basis by five masks to produce an active matrix substrate carrying a topmost ITO film. There is, however, presented a problem that, since the second passivation film
107
, a-Si layer
104
and the gate insulating film
103
are etched in a lump at the process step of FIG.
62
(
c
), the lateral surface of the a-Si layer
104
is exposed without being covered by the second passivation film
107
.
If the lateral surface of the a-Si layer
104
is exposed, it is caused to contact the ITO film
108
formed subsequently. Moreover, if the active matrix substrate is configured as a liquid crystal device, the liquid crystal material directly contacts the a-Si layer
104
.
If the ITO film
108
contacts the lateral surface of the a-Si layer
104
, not covered by the pass i vat ion film, the metal as a constituting component of the ITO film
108
is diffused as impurity into the inside of the a-Si layer
104
, thereby appreciably deteriorating the performance of the thin-film transistor. For evading this problem, the passivation film can again be deposited after the step of FIG.
62
(
c
) and before the step of FIG.
Hayase Takasuke
Ihida Satoshi
Kaneko Wakahiko
Kanou Hiroshi
Sakamoto Michiaki
Jackson Jerome
McGinn & Gibb PLLC
NEC LCD Technologies Ltd.
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