Method and system for detecting an arc condition

Details Method and system for detecting an arc condition Method and system for detecting an arc condition

2001-12-28

2004-05-25

Pert, Evan (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S754090

Reexamination Certificate

active

06741092

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to detection of an arc condition.
BACKGROUND OF THE INVENTION
As is known, integrated electronic circuits or “chips” are manufactured as dice on a semiconductor wafer. After manufacture of a wafer, each die on the wafer is subjected to functionality tests to identify defective dice and/or to rate properly functioning dice.
FIG. 1
illustrates a common system for testing semiconductor wafers. A prober
124
includes a boat
120
for storing wafers. A robotic arm
122
moves the wafers between the boat
120
and a stage
118
. Once a wafer
116
is placed on the stage
118
, the stage is moved such that dice on the wafer contact probes
114
on a probe card assembly
112
. Numerous electrical connections
110
connect the probe card assembly
112
to a test head
108
. A tester
102
controls testing of a wafer
116
. Communication cables
104
and
106
connect the tester
102
to the test head
108
and the prober
124
.
The tester
102
controls testing of a wafer
116
by sending commands to the prober
124
and commands and test data to the test head
108
via communication cables
104
and
106
. The tester
102
also receives status from the prober
124
and status and response data generated from the test head
108
also via communication cables
104
and
106
.
To test wafers, the tester
102
, which is typically a computer, executes a test program designed specifically for the wafers. A typical test program begins by sending commands to the prober
124
to remove a wafer from the boat
120
and place the wafer on the stage
118
. The test program then sends commands to the prober
124
causing the stage
118
to move the wafer
116
into contact with the probes
114
of the probe assembly
112
. The test program then sends test data to the test head
108
. The test data is input to dice on the wafer
116
via the probe assembly
112
. Response data generated by the dice on the wafer
116
is output from the dice through the probe card assembly
112
to the test head
108
, from where it is sent to the tester
102
. The tester
102
then evaluates the test data, determining whether the tested dice are functional or defective and sometimes rating the tested dice.
Because a typical probe assembly
112
does not have enough probes
114
to contact all of the dice on a wafer
116
, the stage
118
must repeatedly move the wafer with respect to the probe elements. Thus, once the dice on wafer
116
in contact with probes
114
are tested, the tester
102
issues commands to the prober, causing the stage
118
to reposition the wafer
116
so that the probes
114
contact other as yet untested dice on the wafer.
Among the signals communicated to the dice on wafer
116
via probes
114
are power signals to provide power to the dice. If, however, power is applied to any of probes
114
as the wafer
116
is being moved either into contact with the probes or out of contact with the probes, an arc of electricity may jump the gap between the probes and the contact pads on the dice. Such an arc can damage the probes, the contact pads on the dice, or both. Although arcing is most likely to occur where probes
114
are delivering power to the dice, arcing may also occur where probes are delivering data or other types of signals to the dice. It is thus important that the test program executed by the tester
102
cause the test head
108
to power down at least those probes
114
that are delivering power to the dice while the stage
118
is moving the wafer
116
. It may also be helpful to power down all probes
114
while the stage
118
is moving the wafer
116
.
SUMMARY OF THE INVENTION
While probes in a semiconductor test system are being moved into or out of contact with a semiconductor wafer, the voltage level of power supplied to selected ones of the probes is monitored. If the voltage level of the power exceeds a level that could cause an arc between the probes and the semiconductor wafer while the wafer is being moved, an indication is generated that an arc condition has been detected.


REFERENCES:
patent: 5789926 (1998-08-01), Badenlou
patent: 5993615 (1999-11-01), Abry et al.
patent: 6441629 (2002-08-01), Khoury et al.

Affiliated with

Also associated with

Rating

Method and system for detecting an arc condition does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for detecting an arc condition, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for detecting an arc condition will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3245505