Functional unit with a pointer for mispredicted resolution, and

Details Functional unit with a pointer for mispredicted resolution, and Functional unit with a pointer for mispredicted resolution, and

1997-03-17

1998-10-13

Donaghue, Larry D.

39580023, 395393, 395391, 395582, 395584, 395586, G06F 938

Patent

active

058225749

ABSTRACT:
A superscalar microprocessor is provided having functional units which receive a pointer (a reorder buffer tag) which is compared to the reorder buffer tags of the instructions currently being executed. The pointer identifies the oldest outstanding branch instruction. If a functional unit's reorder buffer tag matches the pointer, then that functional unit conveys its corrected fetch address to the instruction fetching mechanism of the superscalar microprocessor (i.e. the branch prediction unit). The superscalar microprocessor also includes a load/store unit which receives a pair of pointers identifying the oldest outstanding instructions which are not in condition for retirement. The load/store unit compares these pointers with the reorder buffer tags of load instructions that miss the data cache and store instructions. A match must be found before the associated instruction is presented to the data cache and the main memory system. The pointer-compare mechanism provides an ordering mechanism for load instructions that miss the data cache and store instructions.

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