Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
2002-09-20
2004-04-27
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
Reexamination Certificate
active
06727119
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor manufacturing technique and more particularly to a technique which is effectively applicable to underfill sealing in, for example, a crystal oscillator module with a crystal resonator mounted thereon.
In many of crystal oscillator modules with a crystal resonator mounted thereon, a semiconductor chip and chip components such as a chip capacitor are mounted on a wiring substrate having a recess.
More particularly, a semiconductor chip and a chip capacitor are mounted on a concave wiring substrate and an oscillator with a crystal resonator mounted thereon is stacked on the wiring substrate.
As to such a module wherein a semiconductor chip and a chip capacitor are mounted in a recess (also called a cavity) of a wiring substrate and an oscillator with a crystal resonator mounted thereon is stacked on the wiring substrate, a related description is found, for example, in Japanese Published Unexamined Patent Application No. 2000-138339, in which a chip capacitor is mounted between the walls of a recess and a semiconductor chip.
SUMMARY OF THE INVENTION
However, in connection with the crystal oscillator module of the aforesaid structure, the present invention has found out the following point. If the spacing between the walls of the recess and the semiconductor chip is narrowed with the intention of a further reduction of size and a chip capacitor is mounted into the semiconductor chip, there arises the following problem in underfill sealing. As the gap between the semiconductor chip and the walls becomes narrower, it becomes smaller than the diameter of a nozzle used for the potting of resin, or it becomes impossible to ensure a sufficient gap for stable insertion of the resin potting nozzle. To cope with such circumstances it has become necessary to effect the potting of resin from a position higher than the back surface of the semiconductor chip without inserting the resin potting nozzle into the chip-wall gap.
However, according to the finding of the present inventor, if an attempt is made to effect the potting of resin from a higher position than the back surface of the semiconductor chip, there arises a new problem that it becomes difficult to control the flow of resin.
More particularly, if the nozzle is displaced on the back surface of the semiconductor chip, the resin gets on the back surface of the chip, thus giving rise to the problem that the gap between a main surface of the chip and the wiring substrate cannot be sealed to a satisfactory extent. Further, if the nozzle is displaced onto a wall portion, the resin gets on the wall portion and contaminates electrodes formed on the wall portion, thus giving rise to the problem that it becomes impossible to ensure connection with the electrodes.
For effecting a highly accurate positioning of the nozzle to solve such problems, a long time is required for the positioning, with consequent prolongation of the time required for the manufacturing process. As another countermeasure, if there is used a finer nozzle to ensure a margin for the positioning, the potting speed of resin becomes lower because of using a fine nozzle, also resulting in that the time required for the manufacturing process becomes longer. Further, as long as the controllability for creating a stable resin flow is to be ensured, it is difficult to make the chip-wall gap narrower, thus obstructing the reduction in size of the semiconductor device.
It is an object of the present invention to provide a method of manufacturing a semiconductor device which can improve the workability for underfill sealing.
It is another object of the present invention to provide a method of manufacturing a semiconductor device which can attain the stabilization of underfill sealing.
It is a further object of the present invention to provide a method of manufacturing a semiconductor device which can attain the reduction of the manufacturing cost.
The above and other objects and novel features of the present invention will become apparent from the following description and the accompanying drawings.
Typical inventions disclosed herein will be outlined below.
According to the present invention there is provided a method of manufacturing a semiconductor device, comprising the steps of providing a wiring substrate, the wiring substrate having a recess, a stepped portion and a resin passage, the stepped portion being formed in part of a surrounding portion of an opening of the recess and having a first face higher than a bottom of the recess, the resin passage being adjacent to the stepped portion and contiguous to the bottom of the recess; providing a semiconductor chip having salient electrodes; flip-chip-connecting the semiconductor chip to the recess of the wiring substrate; disposing a nozzle so as to partially overhang a corner portion of the first face of the stepped portion; and dropping the resin from the nozzle onto the corner portion of the stepped portion, allowing the resin to be admitted between the bottom of the wiring substrate and the semiconductor chip through the resin passage.
REFERENCES:
patent: 6207475 (2001-03-01), Lin et al.
patent: 6391682 (2002-05-01), Tsai et al.
patent: 6391683 (2002-05-01), Chiu et al.
patent: 6498054 (2002-12-01), Chiu et al.
patent: 2000-138339 (2000-05-01), None
Geyer Scott B.
Miles & Stockbridge P.C.
Pert Evan
Renesas Technology Corp.
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