Semiconductor inspection apparatus

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S017000, C438S667000

Reexamination Certificate

active

06714030

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of inspecting semiconductor elements or semiconductor devices formed on a wafer, and more particularly to an inspection apparatus for measuring electrical characteristics during semiconductor manufacture processes such as probing inspection and burn-in inspection.
2. Description of the Related Art
Manufacture processes for semiconductor elements such as ICs (Integrated Circuits) and LSIs (Large Scale Integrated circuits) are roughly classified into pre-processes until circuits are formed on a silicon wafer surface and post processes until the silicon wafer is scribed into separate chips which are sealed by resin, ceramic or the like. At a predetermined stage during the pre-process, the electrical characteristics of each circuit of a semiconductor device is inspected to judge whether each chip is good or defective. The electrical characteristic inspection is divided into probing inspection for judging conduction error between circuits and burn-in inspection for selecting defective circuits at an accelerated speed by applying thermal and electrical stress to the circuit at a high temperature of about 150° C.
Both the probing inspection and burn-in inspection use generally similar connection means for the connection between a test wafer and an external inspection system. More specifically, conductive fine probes are mechanically pushed against electrode pads made of aluminum alloy or another alloy patterned on a test wafer at a pitch of several tens &mgr;m to several hundreds &mgr;m and having a square shape of several tens to several hundreds &mgr;m and about 1 &mgr;mm thick.
The structure of a conventional probe is shown in
FIGS. 13 and 14
.
In the example shown in
FIG. 13
, each probe
141
is generally made of tungsten and having a fine needle with its tip diameter of several tens &mgr;m and a length of several tens mm. The probe
141
is fixed to a substrate
142
or insulating jig
143
or deformed in order that its tip is aligned to a corresponding electrode pad on a test wafer.
In the example shown in
FIG. 14
, each probe
151
is a metal projection formed on the surface of an organic thin film
152
such as a polyimide film. The metal projection is a semisphere metal projection formed mainly by a repetition of a plating process or a conical metal projection formed by using an anisotropically etched hole in a silicon substrate as the plating mold. A set of such projections are formed on the surface of the organic thin film
152
.
Means for solving the problems of these two conventional techniques to be described later is made public in the publications JP-A-6-123746, JP-A-7-7052, JP-A-8-50146, and JP-A-9-243663.
In the publication JP-A-6-123746, notches are formed in an elastically deformable card and a plurality of elastically deformable probe needles are uniformly formed. The tip of each probe needle is formed with a plurality of contact members capable of contacting an electrode of a semiconductor element.
In the publication JP-A-7-7052, an electrical characteristic measuring probe has a cantilever structure made of at least one of a single crystal silicon layer, a silicon oxide layer, a silicon nitride layer, a polysilicon layer and a metal layer. The surface of the cantilever structure is coated with a conductive metal film and held by an insulating substrate with a conductive wiring pattern, to thereby use it as the probe.
In the publication JP-9-243663, a silicon substrate worked to have a diaphragm is formed with a plurality of contact probes on the contact surface of the diaphragm. Elastomer is coated on the diaphragm to form an electrical characteristic measuring probe.
SUMMARY OF THE INVENTION
The conventional method of inspecting a semiconductor device as described above has the following problems.
With the probe structure shown in
FIG. 13
, it takes a long time to align and fix each probe with a high precision, and mass production of inexpensive probe structures is difficult. In addition, a number of regions for aligning and fixing respective probes are necessary. It is therefore difficult to dispose a number of probes on a substrate, and the number of electrode pads or chips capable of being inspected collectively at one time is limited. Further, since the length of each probe is as long as about several tens mm, the parasitic capacitance of each probe is large so that it is practically impossible to inspect a high speed device of about 100 Mhz.
Still further, the radius of curvature of each probe tip is large. In order to break the insulating natural oxide film formed on the surface of an electrode pad of a test wafer, it is necessary to apply a large pressure load and scribe the electrode pad surface. Therefore, the probe tip is fast to be abraded, the life time (durable inspection times) of the probe is short, and electrode pad dusts generated during scribing may contaminate the semiconductor device manufacture environment.
With the probe structure shown in
FIG. 14
, probes are disposed at a fine pitch on the surface of the organic thin film such as polyimide, in correspondence with the positions of electrode pads of a test wafer. If there is a variation in warp of test wafers or in height of probes, it is difficult to absorb each distance variation between the probe and a corresponding electrode pad. The probe uses as its base member the organic thin film such as a polyimide film whose coefficient of linear expansion is greatly different from that of a test wafer. Therefore, in the burn-in inspection at a high temperature of about 150° C., there is a large difference of linear expansion coefficient between the probe and test wafer, so that position misalignment may exist between the probe and the electrode pad positioned remotely from the center of the test wafer.
According to the publication of JP-A-6-123746, the card is made of synthetic resin or metal. It is therefore difficult to align probes at a fine pitch corresponding to the positions of electrode pads of a test wafer, i.e., difficult to form a plurality of probe needles each being elastically deformable.
In the publication of JP-A-7-7052, each cantilever probe made of a silicon based member is bonded to the surface of another insulating substrate. Therefore, a manufacture yield is low and the height of respective probes is irregular.
In the publication of JP-A-9-243663, it is described that the diaphragm formed on the silicon substrate deforms in conformity with deformation of a test wafer, because of use of elastomer (elastic material). However, this approach does not consider a variation in thicknesses of diaphragms. If a diaphragm having a variation in warp or thickness is deformed, the height of the contact probe cannot be controlled. Since the depth direction of the electrical characteristic measuring pad of a test wafer cannot be controlled, some area of the pad does not contact the probe if a pressure force is insufficient. Conversely, if the pressure force is too large, the probe may move deep under the pad and the test wafer may be broken.
In each of the probe structures described above, electrical wiring leads between the tips of probes and an external inspection system are formed on the same surface as the probe forming surface of the substrate. It is therefore necessary to form all external contact terminals to be concentrated on the outer peripheral area of the substrate. The area capable of forming external contact terminals is therefore limited, and it is difficult to electrically connect a number of probes to the external. It is difficult to perform a broad area simultaneous inspection, such as inspection of all electrode pads of a test wafer collectively at one time.
It is an object of the present invention to solve many problems described above and provide an apparatus and method of inspecting the electrical characteristics of a semiconductor device, capable of inspecting collectively at one time all electrode pads in a large area of, for example, a test wafer, to thereby impro

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor inspection apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor inspection apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor inspection apparatus will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3242850

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.