Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-05-24
2004-07-20
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S110000, C438S113000, C438S116000, C257S680000, C257S729000, C257S730000
Reexamination Certificate
active
06764875
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of passivating semiconductor die, especially hermetically. More particularly, this invention relates to mounting and sealing an optically transparent lid onto an optically active semiconductor integrated circuit.
BACKGROUND OF THE INVENTION
In the manufacture of integrated circuits (chips) it is well known that it is desirable to encapsulate the chip protected from mechanical damage and contamination. These techniques are known to passivate the chips. There are a variety of well known techniques available for encapsulating the chip. These techniques include mounting the chip within a cavity in a package, wire bonding the chip to a lead frame and then enclosing the package with a lid. Another well known technique includes mounting the chip to a lead frame, wire bonding the chip to the lead frame and then passivating the chip and a portion of the lead frame in a molded plastic or plastic epoxy body. A third common technique for passivating a chip includes flip-chip bonding the chip to a printed circuit board and then covering the chip with a plastic resin.
An EPROM is a read-only memory device. The program or data which is stored in an EPROM can only be erased by causing or allowing optical radiation (ultraviolet and visible) to impinge on the surface of the EPROM. Accordingly, conventional chip packaging techniques are inadequate because they are opaque to optical radiation. To solve this problem, makers of ultraviolet and visible EPROMs mount the EPROM chip within the cavity of a ceramic package and hermeticallly seal the assembly with an optically transparent lid.
Micro-electro-mechanical devices (MEMs) are another well known class of silicon semiconductors devices. MEMs are useful for a variety of applications including strain gauges, accelerometers, electronic levels, and also for displays or other optical devices. Because of their extremely small moving parts, MEMs are particularly susceptible to ambient conditions. Accordingly, MEMs are traditionally sealed within the cavity of an hermetic package which is then hermetically sealed to control the environment to which the MEM is subjected.
When the MEM is to be used in a display application, it is required that optical energy (light) be able to penetrate the package, impinge on the surface of the MEM for modulation, and then escape from the package for forming a display image. The ability of light to enter and leave the package is also required for other optical devices as well. Though conventional ceramic packages are hermetic, because they are opaque they are unsuitable for use with a display or optical MEM. In certain display or optical MEM applications, the MEM is mounted within the cavity of a ceramic package. The assembly is made hermetic by affixing a transparent lid to the ceramic package with an hermetic seal in much the same way as an EPROM package.
It is well known that much of the cost associated with manufacturing silicon semiconductor devices is incurred through the packaging technology. This is particularly true with hermetic ceramic packages. The cost of packages including an optically transparent window is considerably more expensive still.
Under certain circumstances when building a display or other optical MEM assembly it is important that the MEM and transparent lid have a precise physical relationship to one another. For some applications, it is important that the MEM and transparent lid be precisely parallel to one another. For other applications, it is important that the MEM and transparent lid are a precise angle between the structures. Conventional silicon semiconductor chip packaging technology does not take into account an ability to control an angle between the chip and the package lid.
What is needed is a method of and an apparatus for hermetically sealing MEMs intended for use in a display application. What is needed is a method of and an apparatus for hermetically sealing MEMs intended for use in an optical application. What is further needed is a method of and an apparatus for sealing MEMs having a high pin count. Also what is needed is a method of and an apparatus for protecting MEMs which is relatively inexpensive. There is a need for a method of and an apparatus for hermetically sealing the display MEM which can be mounted to the MEM through an uncomplicated manufacturing process. What is further needed is a method and apparatus for sealing display MEMs where an angle of the lid relative to the MEM can be precisely controlled through the assembly process.
SUMMARY OF THE INVENTION
A method and apparatus of hermetically passivating a semiconductor device includes sealing a lid directly onto a semiconductor substrate. An active device is formed on the surface of the substrate and is surrounded by a substantially planar lid sealing region, which in turn is surrounded by bonding pads. A first layer of solderable material is formed on the lid sealing region. A lid is provided which has a second layer of solderable material in a configuration corresponding to the first layer. A solder layer is provided between the first layer and second layer of solderable materials. In the preferred embodiment, the solder is formed over the second layer. Heat is provided to hermetically join the lid to the semiconductor device without requiring a conventional package. Preferably the first and second layers are sandwiches of conventionally known solderable materials which can be processed using conventional semiconductor techniques. An angle between the lid and the semiconductor device can be controlled by adjusting relative widths of one or both the layers of solderable materials.
Alternatively, the lid can be sealed to the substrate using other techniques. In a first alternative, an epoxy can be used. An optional first spacing material is formed in the lid sealing region. An epoxy is formed in a configuration corresponding to the lid sealing region. The lid and the semiconductor device are aligned and heated to hermetically join them together.
In a second alternative, a glass frit can be used. An optional second spacing material is formed in the lid sealing region. A glass frit is formed in a configuration corresponding to the lid sealing region. The lid and the semiconductor device are aligned and heated to hermetically join them together.
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Haverstock & Owens LLP
Silicon Light Machines
Vockrodt Jeff
Zarabian Amir
LandOfFree
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