Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2003-01-17
2004-03-16
Vigushin, John B. (Department: 2827)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S763000, C361S782000, C361S783000, C361S793000, C257S700000, C257S724000
Reexamination Certificate
active
06707681
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a preferred surface mount typed electronic circuit for use in a portable phone and the like.
2. Description of the Related Art
The conventional electronic circuit is formed in mounting electric components such as a resistor, a condenser, and a coil-shaped inductance element on an insulating substrate and mounting a bare chip forming a semiconductor circuit, on the insulating substrate at a position other than the position where the electric components are mounted.
In the conventional electronic circuit, the electric components must be mounted on a position distant from the bare chip surface, which prolongs an electric conductor connecting the electric components including the inductance element and the semiconductor circuit, hence to reduce Q especially in high-frequency.
Further, the electric components are bared on the insulating substrate, which enlarges the size problematically.
Then, the invention is to provide a surface mount typed electronic circuit of small size, which can obtain a high Q.
SUMMARY OF THE INVENTION
As first solving means of solving the above problem, the electronic circuit is provided with a plate-shaped bare chip where a semiconductor circuit is formed and a plate-shaped insulating substrate to be overlapped with this bare chip. On the bottom surface of the bare chip, a plurality of first electrodes connected to the semiconductor circuit and at least two second electrodes connected to the semiconductor circuit are provided. The insulating substrate includes a plurality of first lands provided on the top surface thereof corresponding to the first electrodes, at least two second lands provided on the top surface thereof corresponding to the second electrodes, a plurality of terminals for external connection having conductive pattern provided on the bottom surface, with at least one of them connected to the first lands, and an inductance element having the conductive pattern whose end portions are connected to the second lands. The bare chip is overlapped with the insulating substrate, so as to respectively connect the first electrodes and the second electrodes to the first lands and the second lands.
As second solving means, the surface mount typed electronic circuit is constituted in that the first electrodes are provided in an outer peripheral portion of the bare chip and the second electrodes are provided in a center of the bare chip, and that the first lands are provided in an outer peripheral portion of the insulating substrate and the second electrodes are provided in a center of the insulating substrate.
As third solving means, it is constituted in that the insulating substrate is formed by a stack of insulating thin plates.
As fourth solving means, it is constituted in that the inductance element is formed vortecosely.
As fifth solving means, it is constituted in that in the vortical inductance element, at least an intersecting portion thereof is formed on different surfaces in a thickness direction so as not to be in contact with each other.
As sixth solving means, it is constituted in that each of the respective terminals is formed in an area lager than each of the first lands.
As seventh solving means, it is constituted in that the terminals are distributed all over the bottom surface of the insulating substrate.
As eighth solving means, it is constituted in that a resistor and/or a condenser is formed within the insulating substrate depending on a thick film or a thin film.
REFERENCES:
patent: 5710458 (1998-01-01), Iwasaki
patent: 6310386 (2001-10-01), Shenoy
patent: 2002/0118523 (2002-08-01), Okaba et al.
patent: 2002-009225 (2002-01-01), None
Osada Shigeru
Suzuki Takeo
Alps Electric Co. ,Ltd.
Brinks Hofer Gilson & Lione
Vigushin John B.
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