Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead
Reexamination Certificate
2003-01-07
2004-09-07
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
C257S735000, C257S736000, C257S737000
Reexamination Certificate
active
06787903
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor devices with under bump metallurgy (UBM) and fabrication methods thereof, and more particularly, to a flip-chip semiconductor device formed with UBM structures and a method for fabricating the semiconductor device.
BACKGROUND OF THE INVENTION
Flip-chip semiconductor packages employ advanced packaging technology that is characterized by mounting a semiconductor chip in a face-down manner on a substrate and electrically connecting the semiconductor chip to the substrate via a plurality of solder bumps. This structure yields significant benefits without having to use relatively space-occupying bonding wires for electrically connecting the semiconductor chip to the substrate, thereby making the overall package structure more compact in size.
Referring to
FIG. 1
, for forming a solder bump
150
to a semiconductor chip
100
, the first step is to form an under bump metallurgy (UBM) structure
130
on a bond pad
110
of the semiconductor chip
100
. The UBM structure
130
includes an adhesion layer
130
a
such as aluminum layer formed over the bond pad
110
; a barrier layer
130
b
such as nickel/vanadium (Ni/V) alloy applied over the adhesion layer
130
a
; and a wetting layer
130
c
such as copper layer formed on the barrier layer
130
b
. A solder material can be applied over the wetting layer
130
c
and reflowed to form the solder bump
150
on the UBM structure
130
. This UBM structure
130
serves as a diffusion barrier and provides proper adhesion between the solder bump
150
and the bond pad
110
of the semiconductor chip
100
.
Fabrication of the UBM structure generally adopts sputtering, evaporation and plating processes.
FIGS. 2A
to
2
E illustrate conventional fabrication processes for a solder bump on a flip chip. Referring to
FIG. 2A
, the first step is to prepare a semiconductor chip
100
formed with a plurality of bond pads
110
on a surface thereof, and to apply a passivation layer
120
over the surface of the semiconductor chip
100
. The passivation layer
120
is selectively removed to expose the bond pads
110
of the semiconductor chip
100
. Then, sputtering and plating processes are performed to form a UBM structure
130
on each of the bond pads
110
.
Referring to
FIG. 2B
, next, a solder mask film
140
such as dry film is applied over the passivation layer
120
and formed with a plurality of openings
141
for exposing the UBM structures
130
.
Referring to
FIG. 2C
, then a solder-applying process is performed by which a solder paste such as tin/lead (Sn/Pb) alloy is applied via the openings
141
through the use of screen-printing technology over the UBM structures
130
to form a plurality of solder bumps
150
respectively on the UBM structures
130
.
Referring to
FIG. 2D
, a first reflow process is carried out to bond the solder bumps
150
to the corresponding UBM structures
130
. Then, the solder mask layer
140
is removed, and a second reflow process is performed to make the solder bumps
150
have a ball shape, as shown in FIG.
2
E.
Prior art references relating to UBM technology include, for example, U.S. Pat. No. 5,773,359 entitled “Interconnect System and Method of Fabrication”, U.S. Pat. No. 5,904,859 entitled “Flip Chip Metallization”, and U.S. Pat. No. 5,937,320 entitled “Barrier Layers for Electroplated SnPb Eutectic Solder Joints”; to name just a few.
In respect of fabricating a UBM structure on an aluminum-made bond pad (hereinafter referred to as “aluminum pad”) of a semiconductor chip, an aluminum layer (or a chromium layer) is firstly formed over the aluminum pad to provide adhesion between the aluminum pad and the UBM structure. Then, a nickel/vanadium (Ni/V) layer is deposited over the aluminum layer to serve as a barrier for preventing intermetallic compounds formed from reaction between the aluminum pad and a solder-bump electrode. Finally, a copper layer (or a layer made of nickel, palladium or molybdenum) is applied on the Ni/V layer for allowing the solder bump to be successfully bonded to the UBM structure. However, this UBM structure is not applicable to a copper-made bond pad (hereinafter referred to as “copper pad”) because the aluminum layer formed over the bond pad has relatively poor adhesion to copper, making the UBM structure not strongly bonded to the copper pad. Therefore, for forming a UBM structure on a copper pad, the first step is to apply a titanium (Ti) layer over the copper pad, and the Ti layer provides good adhesion between the UBM structure and the copper pad. Then, a Ni/V layer and a copper layer are formed over the Ti layer for allowing a solder bump to be strongly bonded thereon. Although the Ti layer enhances adhesion between the copper pad and the UBM structure, this Ti layer is poorer in electrical conductivity than aluminum and thus degrades electrical connection between the solder bump and the copper pad.
Therefore, the problem to be solved herein is to provide good electrical connection and adhesion between a UBM structure and a copper-made bond pad.
SUMMARY OF THE INVENTION
A primary objective of the present invention is to provide a semiconductor device with under bump metallurgy (UBM) and a method for fabricating the same, so as to effectively improve electrical connection between a UBM structure and a bond pad of the semiconductor device.
Another objective of the invention is to provide a semiconductor device with under bump metallurgy and a method for fabricating the same, which can greatly enhance adhesion between a UBM structure and a bond pad or a passivation layer of the semiconductor device.
In accordance with the foregoing and other objectives, the present invention proposes a semiconductor device with under bump metallurgy (UBM), comprising: a device body having at least a surface formed with a plurality of bond pads thereon; a passivation layer applied over the surface of the device body and formed with a plurality of openings for exposing the bond pads via the openings; a plurality of UBM structures, each of which includes a first metal layer for covering part of each of the bond pads and a portion of the passivation layer around the corresponding bond pad, a second metal layer for covering the first metal layer and part of the bond pad uncovered by the first metal layer, and at least a third metal layer applied over the second metal layer; and a plurality of solder bumps formed on the UBM structures respectively.
A method for fabricating the semiconductor device with under bump metallurgy of the invention comprises the steps of: applying a passivation layer over at least a surface of a device body formed with a plurality of bond pads thereon, wherein the passivation layer is formed with a plurality of openings for exposing the bond pads via the openings; forming a first metal layer (such as a titanium layer) over part of each of the bond pads and a portion of the passivation layer around the corresponding bond pad; applying a second metal layer (such as a copper layer) over the first metal layer and part of the bond pad uncovered by the first metal layer; applying at least a third metal layer (such as a nickel layer) over the second metal layer, and forming a solder bump on the UBM structure.
The above semiconductor device with under bump metallurgy (UBM) is characterized in that the first metal layer (titanium layer) of the UBM structure only covers partly the bond pad and the passivation layer around the bond pad, thereby assuring good adhesion between the UBM structure and the bond pad and passivation layer. Moreover, with the bond pad being only partly covered by the first metal layer, the second metal layer (copper layer) subsequently formed on the first metal can directly come into contact with the copper-made bond pad, so as to provide good electrical connection between the UBM structure and the bond pad.
REFERENCES:
patent: 5773359 (1998-06-01), Mitchell et al.
patent: 5904859 (1999-05-01), Degani
patent: 5937320 (1999-08-01), Andricacos et al.
patent: 5946590 (1999-08-01), Satoh
pat
Corless Peter F.
Edwards & Angell LLP
Ha Nathan W.
Jensen Steven M.
Pham Long
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