Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1999-04-21
2004-01-13
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S301000, C348S241000, C250S208100
Reexamination Certificate
active
06677996
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an electronic camera, and more particularly, to a circuit for regulating the amount of light falling upon the image field to optimize picture quality.
2. Description of Related Art
The quality of a photograph, whether produced by standard film based cameras or electronic cameras, is dependant on the amount of light that falls upon the imaging surface. Too much light or too little light will degrade the quality of a picture. Because background light is easily measured in daylight, regulating the shutter speed and other factors affecting the amount of light entering the aperture is not generally difficult in natural light pictures. The problem becomes more challenging when background light is insufficient to photograph an object, and an electronic flash must be used. There is no background light to measure when pointing a camera toward the darkness. Past methods for regulating film exposure in flash situations have involved calculations which considered the distance from the camera to the object, the reflectivity of the object being photographed and the intensity of the flash. These factors theoretically allow a photographer to prepare the camera settings so as to optimize a picture. The process was a cumbersome one and usually involved more than a little guesswork.
AS advances were made in flash photography, the single use flash bulb was replaced by a reusable light source, often referred to as a “strobe” owing to its short cycle and rapid rise and fall in luminescence. Because strobes were reusable, the flash duration was not determined by when the bulb “burned out” (as with traditional flash bulbs), but by control circuitry establishing a duration for the flash. More sophisticated control circuitry allowed for a variable duration of the strobe flash. By controlling the duration of the “on” period of the strobe, the total light output could be controlled.
This did not, however, eliminate the need to calculate the distance from the object and its reflectivity to determine the proper duration for the flash. In order to avoid these calculations, circuitry was developed wherein a photocell measured the amount of light reflected back onto the camera during the actual flash. Through use of a high speed comparator circuit, this reflected light was compared to an optimum preset figure. After the optimum amount of light had been received, the strobe was turned off through any one of several circuit designs. One means was to trigger a “snubber” tube which immediately discharged the flash tube storage capacitor. Another means was to turn off an IGBT high power transistor controlling the current through the flash tube. Although these systems measured the flash in real time, noteworthy shortcomings inhered in their implementation. The photocell circuitry increased the cost, complexity, size, weight, and power consumption of a flash camera. Moreover, controlling the flash duration by discharging the energy stored in the storage capacitor was inimical to another important goal of flash cameras—extending the life of a flash battery between chargings by minimizing power consumption.
These problems led to the development of a two-flash system. This process involves a flash unit that takes two flashes in quick succession. The “control flash” occurs first, at a low intensity flash perhaps 10% of the power which will be discharged in the subsequent “imaging flash”. The reflected light of the control flash is analyzed by the camera's microprocessor which automatically adjusts one or more of the camera's parameters (aperture, flash duration, etc.), so as to optimize settings for the forthcoming imaging flash. In a typical through the lens camera, the sample light from the control flash is analyzed after following the same path that the imaging flash will travel. For this reason, two-flash systems are particularly useful in situations which use a zoom or macro lens, or a filter. Although some of the separate photocell circuitry could be eliminated, or reduced, fairly complex calculating and control mechanisms remained. Moreover, any advantages realized by the two-flash system must be balanced against a whole new set of disadvantages. A two-flash system wastes unnecessary energy from the battery as a result of the first flash. There is also the added cost and complexity of designing and installing a flash unit that can be flashed twice in rapid succession. These complexities are not limited to the twoflash unit itself, but extend to conventional “slave” flash units which are stacked or added for additional luminosity. Because conventional slave units are typically triggered along with the first flash of a two-flash unit, specially designed slave units must be used which synchronize the flash of the slave unit with the second flash of the two-flash unit.
Multiple user disadvantages also commonly inhere in the two-flash units. First, photo subjects often blink after the first flash, resulting in a photograph with someone's eyes closed by the time the second flash occurs. Moreover, it is not uncommon for a camera owner to ask a friend or even passers-by to take a photo of him. Typically, the passer-by will be unfamiliar with a two-flash camera, or unaware that the camera operates on that principle. As a result, he will typically move after the first flash has occurred. By the time the second flash occurs, the camera may be sweeping through and arc (resulting in a blurred picture), or pointing toward the sidewalk. The result is a lost opportunity to capture a fleeting memory and a waste of film.
Because of the disadvantages which inhere in two-flash systems, a workable real-time means of measuring light is preferable. The basic digital camera works by a process of sampling pixels and measuring voltage levels. A photo diode represents a single pixel on a CMOS imager (the imaging surface of an electronic camera). The CMOS imager comprises a matrix of pixels, perhaps a thousand by a thousand. As the photodiode within a pixel is exposed to light, the voltage potential V
PD
across the photodiode progressively decays toward zero. V
PD
is therefore inversely proportional to the total amount of light which has fallen on the photo diode. The voltage across the photo diode at the end of the integration phase (the light collecting period when the picture is taken) will determine the brightness or darkness of that particular pixel. Typically, an electronic camera will utilize a photocell to measure an aggregate amount of light falling on it, and trigger a control signal at the appropriate time. The control signal is used to terminate the light exposure to the CMOS imager, either through methods already discussed such as “snubbers” or through more recently developed electronic methods.
FIG. 1
discloses a schematic of a conventional three-transistor imager circuit. The image processing starts with the reset phase. DC cell
13
, typically comprising a voltage from 3.3 to 0.5 volts, drops to ground
15
across a reset-transistor and a photo diode
14
. Initially, no voltage is applied to the gate
6
of the reset ransistor
4
, and the junction from the drain
8
to the source
10
of the reset transistor acts as an open circuit. As a result, the entire voltage from the DC cell
13
drops entirely across the transistor
4
from the source
10
to the drain
8
, represented by V
SD1
. At this time, the voltage drop V
PD1
34
across the photo diode
14
is effectively zero (or whatever charge might remain from the previous photograph). In the second step, a pulse on the reset-transistor gate
6
at a voltage level sufficient to gate the reset-transistor
4
reduces the voltage drop V
SD1
across the reset transistor
4
to the threshold voltage V
t
of the transistor, (typically about 0.5 volts). The voltage drop across the photo diode V
PD1
34
thereby becomes the potential of the DC cell
13
, minus the slight drop across the reset transistor. For example, a cell voltage of 5 volts minus a threshold voltage of 0.5 volts r
Chung Randall M.
Feng Wei
Kim Paul K.
Akin Gump Strauss Hauer & Feld & LLP
Garber Wendy R.
Hannett James
Pictos Technologies, Inc.
Rourk Christopher J.
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