Semiconductor device manufacturing: process – Having organic semiconductive component
Reexamination Certificate
2003-06-18
2004-05-18
Flynn, Nathan J. (Department: 2812)
Semiconductor device manufacturing: process
Having organic semiconductive component
C438S082000, C438S149000, C438S151000, C438S164000, C438S479000, C438S587000, C438S778000, C438S780000
Reexamination Certificate
active
06737294
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a method of reducing surface leakage currents of a thin-film transistor substrate, and more particularly, to a method of reducing surface leakage currents of a thin-film transistor substrate of a liquid crystal display.
2. Description of the Prior Art
A liquid crystal display panel comprises a thin-film transistor (TFT) substrate, a color filter (CF) substrate, and a liquid crystal layer positioned between the TFT substrate and the CF substrate. The TFT substrate contains a plurality of matrix pixels, which consist of a plurality of data lines and a plurality of scan lines, and a plurality of pixel driving circuits consisting of a plurality of electric components, such as thin-film transistors and capacitors. The pixel driving circuits are positioned on the intersections of each data line and each scan line. To control the operation of each pixel, an image data signal is transmitted from the data line to a drain electrode and a transparent pixel electrode within the pixel, and a switching/addressing signal is transmitted from the scan line to a gate electrode within the pixel.
Please refer to
FIG. 1
of a cross-sectional diagram of a thin-film transistor substrate according to the prior art. As shown in
FIG. 1
, a semiconductor layer
12
is formed on a surface of a thin-film transistor substrate
10
. A plurality of p-type doping regions
14
and n-type doping regions
16
are formed in the semiconductor layer
12
, functioning as sources or drains of thin-film transistors and to define the thin-film transistors as n-type thin-film transistors or p-type thin-film transistors. Following that, a gate insulating layer
18
and a first metal layer
20
are formed on the semiconductor layer
12
, respectively. A portion of the first metal layer
20
is removed using a photolithographic process and an etching process, so as to form a plurality of gates
20
on the semiconductor layer
12
.
A thick oxide layer
22
is then formed on the substrate
10
, functioning as an inter layer dielectric (ILD) between the gates
20
and other conductive materials. A second metal layer is formed on the oxide layer
22
. A photolithographic process and an etching process are used to remove portions of the second metal layer, so as to define a source/drain electrode
24
connecting to either of the source
14
and the drain
14
, a source/drain electrode
26
connecting to either of the source
16
and the drain
16
, and a channel region
28
positioned above each gate
20
. Following that, a silicon nitride (SiNx) layer
30
of approximately 3000 angstroms thick is formed on the substrate
10
, functioning as a passivation layer. A transparent conductive layer
32
, such as indium tin oxide (ITO), is formed to connect to the transistors and functions as a pixel electrode, thus completing the fabrication of the substrate
10
.
The silicon nitride layer is usually used in a typical ultra high aperture (UHA) process to cover the transistors. In addition, a contact hole is also used in the UHA process to connect the transparent conductive layer and the drain electrode, so as to increase the area of the transparent conductive layer and the aperture of the substrate. However, the silicon nitride layer has a high dielectric constant and brings high parasitical capacitance to result in abnormal images. In addition, the thickness of the silicon nitride layer is usually limited to less than 5000 angstroms. Therefore, the silicon nitride layer provides poor effects to against moisture and impurity intrusion to the devices and results in surface leakage currents to affect the electrical performances of the devices.
SUMMARY OF INVENTION
It is therefore an objective of the claimed invention to provide a method of forming a thin-film transistor substrate to reduce parasitical capacitance and surface leakage currents of the thin-film transistor substrate.
According to the claimed invention, a plurality of thin-film transistors are formed on a substrate. An insulating layer and a metal layer are formed on the substrate, the metal layer including a source electrode and a drain electrode connecting to each of the transistors, and a channel region defined between the source electrode and the drain electrode. An organic layer is formed to cover the metal layer and the insulating layer. A transparent conductive layer is formed on the organic layer.
It is an advantage of the present invention that portions of the insulating layer positioned between the source electrode and the drain electrode is simultaneously solidified when forming the organic layer. In addition, the moisture is taken out of the insulating layer and the structure of the insulating layer is also repaired during the fabrication process of the organic layer. As a result, the leakage paths of the transistors are prevented and the surface leakage currents of the substrate are thus reduced. Since the organic layer has a lower dielectric constant than the silicon nitride layer used in the prior art, the thickness of the organic layer can be increased according to the present invention. Therefore, the parasitical capacitance between the transparent conductive layer and the drain electrode can be reduced, and the electrical performances of the transistors can also be improved.
REFERENCES:
patent: 5408345 (1995-04-01), Mitsui et al.
patent: 6337222 (2002-01-01), Shimoda et al.
patent: 6475836 (2002-11-01), Suzawa et al.
patent: 6599785 (2003-07-01), Hamada et al.
patent: 6599818 (2003-07-01), Dairiki
patent: 6613620 (2003-09-01), Fujimoto et al.
Chen Kun-Hong
Hu Chin-Wei
Au Optronics Corp.
Flynn Nathan J.
Hsu Winston
Isaac Stanetta
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