Television – Camera – system and detail – Combined image signal generator and general image signal...
Reexamination Certificate
2000-10-24
2004-07-20
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Combined image signal generator and general image signal...
C348S221100, C348S229100, C348S302000, C250S332000
Reexamination Certificate
active
06765610
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-319859, filed Nov. 10, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a photosensor system having a photosensor array constituted by two-dimensionally arraying a plurality of photosensors, and a drive control method thereof.
As a conventional two-dimensional image reading apparatus for reading print, a photograph, or a fine three-dimensional pattern like a fingerprint, some structures have a photosensor array constituted by two-dimensionally arraying photosensors (light receiving elements) in a matrix. This photosensor array generally employs a solid-state imaging device such as a CCD (Charge Coupled Device).
As well known, the CCD has a structure in which photosensors such as photodiodes, or thin film transistors (TFT: Thin Film Transistor) are arranged in a matrix, and the charge amount of pairs of electrons and positive holes generated corresponding to the amount of light entering the light receiving section of each sensor is detected by a horizontal scanning circuit and vertical scanning circuit to detect the luminance of radiation.
In a photosensor system using such a CCD, it is necessary to provide each scanned photosensor with a selective transistor for causing the scanned photosensor to assume a selected state. This increases the system size as the number of pixels increases. To prevent this, a photosensor (to be referred to as a double-gate photosensor hereinafter) is now being developed, which is formed of a thin film transistor having a so-called double-gate structure and has both a photosensing function and selecting function.
FIG. 18A
is a sectional view showing the structure of a double-gate photosensor
10
.
FIG. 18B
is a circuit diagram showing the equivalent circuit of the double-gate photosensor
10
. As shown in
FIG. 18A
, the double-gate photosensor
10
comprises a semiconductor layer
11
formed of amorphous silicon or the like in which pairs of electrons and positive holes are generated upon reception of visible light, n
+
-silicon layers
17
and
18
respectively formed at the both ends of the semiconductor layer
11
, source and drain electrodes
12
and
13
respectively formed on the n
+
-silicon layers
17
and
18
, a top gate electrode
21
formed above the semiconductor layer
11
via a block insulating film
14
and upper gate insulating film
15
, and a bottom gate electrode
22
formed below the semiconductor thin film
11
via a lower gate insulating film
16
. The double-gate photosensor
10
is provided on a transparent insulating substrate
19
formed of glass or the like. In
FIG. 18A
, the top gate electrode
21
, the upper gate insulating film
15
, the lower gate insulating film
16
, and a protective insulating film
20
formed on the top gate electrode
21
are made of materials having high transmittances for visible light which excites the semiconductor layer
11
. To the contrary, the bottom gate electrode
22
is made of a material which shields transmission of visible light, and has a structure of detecting only irradiation light incident from above the structure in FIG.
18
A.
The double-gate photosensor
10
can be considered to be a structure which is formed, on the transparent insulating substrate
19
of glass or the like, from a combination of two MOS transistors using the semiconductor layer
11
as a common channel, i.e., an upper MOS transistor made up of the semiconductor layer
11
, source electrode
12
, drain electrode
13
, and top gate electrode
21
, and a lower MOS transistor made up of the semiconductor layer
11
, source electrode
12
, drain electrode
13
, and bottom gate electrode
22
. This double-gate photosensor
10
can generally be represented by an equivalent circuit as shown in FIG.
18
B. In
FIG. 18B
, TG represents a top gate terminal; BG, a bottom gate terminal; S, a source terminal; and D, a drain terminal.
FIG. 19
is a schematic view showing a photosensor system constituted by two-dimensionally arraying double-gate photosensors. As shown in
FIG. 19
, the photosensor system is roughly constituted by a photosensor array
100
that is comprised of a large number of double-gate photosensors
10
arranged in an n×m matrix, top and bottom gate lines
101
and
102
that connect the top and bottom gate terminals TG and BG of the double-gate photosensors
10
in a row direction, top and bottom gate drivers
111
and
112
respectively connected to the top and bottom gate lines
101
and
102
, data lines
103
that connect the drain terminals D of the double-gate photosensors in a column direction, and an output circuit section
113
connected to the data lines
103
. &phgr;tg and &phgr;bg represent control signals for generating a reset pulse &phgr;Ti and readout pulse &phgr;Bi, respectively, which will be described later, and &phgr;pg represents a pre-charge pulse for controlling the timing at which a pre-charge voltage Vpg is applied.
In the above-described structure, the photosensing function is realized by applying a voltage from the top gate driver
111
to the top gate terminals TG, while the selecting/readout function is realized by applying a voltage from the bottom gate driver
112
to the bottom gate terminals BG, then sending a detection signal to the output circuit section of the output circuit section
113
via the data lines
103
, and outputting serial data Vout.
FIGS. 20A
to
20
D are timing charts showing a method of controlling the photosensor system, and showing a detecting period (i-th row processing cycle) in the i-th row of the sensor array
100
.
First, a high-level pulse voltage (reset pulse; e.g., Vtgh=+15V) &phgr;Ti shown in
FIG. 20A
is applied to the top gate line
101
of the i-th row, and during a reset period T
reset
, reset operation for discharging the double-gate photosensors
10
of the i-th row is executed.
Subsequently, a bias voltage &phgr;Ti of low level (e.g., Vtgl=−15V) is applied to the top gate line
101
, thereby finishing the reset period T
reset
and starting a charge accumulating period Ta in which the channel region is charged. During the charge accumulating period Ta, charges (positive holes) corresponding to the amount of light entering each sensor from the top gate electrode side are accumulated in the channel region.
Then, a pre-charge pulse &phgr;pg with a pre-charge voltage Vpg shown in
FIG. 20C
is applied to the data lines
103
during part of the charge accumulating period Ta, and after a pre-charge period T
prch
for making the drain electrodes
13
keep charges, a bias voltage (readout pulse &phgr;Bi) of high level (e.g., Vbgh=+10V) shown in
FIG. 20B
is applied to the bottom gate line
102
. Then, the double-gate photosensors
10
of the i-th row are turned on to start a readout period T
read
.
During the readout period T
read
, the charges accumulated in the channel region serve to moderate a low-level voltage (e.g., Vtgl=−15V) which has an opposite polarity of charges accumulated in the channel region and is applied to each top gate terminal TG. Therefore, an n-type channel is formed by the voltage Vbgh at each bottom gate terminal BG, the voltage VD at the data lines
103
gradually reduces in accordance with the drain current with lapse of time after the pre-charge voltage Vpg is applied. More specifically, the change trend of the voltage VD at the data lines
103
depends upon the charge accumulating period Ta and the amount of received light. As shown in
FIG. 20D
, the voltage VD tends to gradually reduce when the incident light is dark, i.e., a small amount of light is received, and hence only small charges are accumulated, whereas they tend to suddenly reduce when the incident light is bright, i.e., large amount of light is received, and hence large charges are accumulated. From this, it is understood that the amount of
Casio Computer Co. Ltd.
Frishauf Holtz Goodman & Chick P.C.
Garber Wendy R.
Ye Lin
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