Method and apparatus for cleaning substrates using liquid...

Cleaning and liquid contact with solids – Apparatus – With treating fluid purifying or separating means

Reexamination Certificate

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C134S105000, C134S108000, C134S184000, C134S186000, C134S902000

Reexamination Certificate

active

06763840

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods and apparatus for cleaning substrates, and, more particularly, to methods and apparatus for cleaning substrates using CO
2
.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs), optoelectronic devices, micromechanical devices and other precision fabrications are commonly formed using thin films applied to substrates. As part of the fabrication process, it is often necessary to remove or clean a portion or all of the thin film from the substrate. For example, in the manufacture of semiconductor wafers including ICs, a thin photoresist layer may be applied to the semiconductor substrate and subsequently removed.
Contaminants removed from surface features of microelectronic substrates after various manufacturing steps (e.g., after post-ion implant, ‘back end of the line’ (BEOL) cleans, ‘front end of the line’ (FEOL) cleans, and post chemical mechanical planarization (CMP) steps) may vary dramatically in nature and composition. Accordingly, cleaning and treating steps must address these contaminants with the appropriate chemistries and solvents to either react with, ionize, dissolve, swell, disperse, emulsify, or vaporize them from the substrate. As such, a variety of wet (e.g., water and solvent) cleaning processes, and dry (e.g., plasma) cleaning processes have been developed to address the broad variety of waste materials.
SUMMARY OF THE INVENTION
The present invention relates generally to, inter alia, the cleaning or treating of microelectronic substrates (such as semiconductor substrates) during or subsequent to the manufacturing of microelectronic substrates such as integrated circuits, microelectronic devices, MEM's, MEOM's and opto-electronic devices. Removal of surface contaminants and particulates is a key step in the integrated circuit fabrication process. There are numerous cleaning steps in the fabrication process including, but not limited to, pre-diffusion cleans, post-ash cleans, post-etch cleans, pre-metal deposition cleans, plasma strip, clean/strip, post-ion implantation cleans and post-chemical mechanical planarization (CMP) cleans. There are many types and sources of particulates and contaminants in the fabrication process. The particles and contaminants may be molecular, ionic, atomic or gaseous in nature. The source may be inherent (e.g., redeposition of resist) or extrinsic to the process (e.g., wafer transport).
In embodiments of the present invention, methods for cleaning a microelectronic substrate in a cluster tool that include placing the substrate in a pressure chamber of a module in a cluster tool, pressurizing the pressure chamber, introducing liquid CO
2
into the pressure chamber, cleaning the substrate in the pressure chamber, removing the liquid CO
2
from the pressure chamber, depressurizing the pressure chamber, and removing the substrate from the pressure chamber are provided.
In other embodiments of the present invention, apparatus for processing a microelectronic substrate are provided that include a transfer module, a first processing module that employs liquid carbon dioxide as a cleaning fluid coupled to the transfer module, and a transfer mechanism coupled to the transfer module. The transfer mechanism is configured to move the substrate between the first processing module and the second processing module.
The shift from Al/SiO
2
interconnect systems to Cu/low-k interconnect systems presents new challenges that may be effectively addressed using the methods and apparatus of the present invention. For example, a primary problem with the transition to Cu is the tendency of Cu to corrode when exposed to an oxidizing environment because Cu does not have the self-passivating properties of Al. Corrosion of Cu during cleans of dual damascene structures can result in high contact resistance, undercutting and lift-off of the dielectric layers, thereby reducing circuit yields. Additional concerns have focused on the chemical compatibility of traditional cleans with low-k materials. As an example, it has been demonstrated that amine chemistries gas from OSG and other inorganic spin-on dielectric films, causing via poisoning. Aspects of the present invention may address the currently challenging cleans of these new interconnect systems.


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