Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
2000-08-01
2004-04-13
Vincent, David (Department: 2661)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S389000
Reexamination Certificate
active
06721313
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This present invention relates generally to communications switch fabric architectures, and more particularly, to a novel switch fabric architecture that uses a modular switch element for providing the following advantages: maximum integration on a single die, more cost effective, allows for links to connect to industry standard interfaces, higher aggregate bandwidth, and greater connectivity with less switch fabric stages.
2. Discussion of the Prior Art
In the recent past, high speed SERializer/DESerializer, or SERDES, transceivers (i.e., data transfer rates greater than 1 Gbps) were implemented in ECL and GaAs because CMOS technology could not support these fast operating frequencies. During the last two years, CMOS technology has advanced so that high speed SERDES can be implemented in CMOS technology and integrated on a die that performs not only the SERDES functions, but also a lot of other functions. SERDES transceivers may be characterized as two fundamental types: 1) where data communication takes place in an Inter-Cabinet, Cabled environment (ICC); and, 2) for a High Speed Backplane (HSB) environment where data communication takes place intra-cabinet, over a printed circuit board or backplane. For the first ICC SERDES transceiver type, it is very desirable that it be compliant with industry standards (e.g., Fibre Channel and InfiniBand™). An example of an HSB SERDES is the IBM Microelectronics Division developed High Speed Serial Link (HSSL) SERDES core. Switch fabric developers have previously used one SERDES type to establish communication between the other devices in their switch fabric.
Because of the requirements of the two different SERDES types, ICC and HSB, there is a significant difference in the quantity of transceivers that may be integrated on a single die. Because the ICC SERDES type must communicate over relatively much longer distances and satisfy industry standard requirements, the maximum number of transceivers that may be integrated on a single die is typically four (4). Because the HSB SERDES type has relatively much less distance to travel, the SERDES design may be significantly optimized and, therefore, a much greater number of HSB transceivers may be integrated on a single die. Currently, it is possible to integrate anywhere from 4 to 96 HSB transceivers on a single die.
It would thus be highly desirable to provide a switch fabric architecture that integrates both ICC and HSB SERDES cores on a single die to provide communication between nodes at high speeds, e.g., greater than 500 Mbps, and which maximally achieves the benefits of both SERDES systems.
Current LAN switch architectures that enable communication between network nodes include U.S. Pat. No. 6,009,092 and U.S. Pat. No. 5,537,403. U.S. Pat. No. 6,009,092 describes a LAN switch architecture having port groups, or link types, that communicate via a switch fabric and are connected to PCs/Workstations, or nodes to enable communication at speeds of up to 155 Mbps (See Col. 1, lines 5-8). The system described in U.S. Pat. No. 6,009,092 makes use of a hybrid architecture with a switching fabric for “port group” to “port group” communication in addition to a “sub-fabric” for intra-port group communication with time division multiplexing for a port to access the switch fabric (Col. 1, lines 22-25). However, only ports are implemented to connect to nodes (Col. 4, lines 14-16) and does not teach or describe the use of unique link types implementing distinct protocols and protocol translation for communicating to the switch fabric. There is furthermore no mention of integrating unique port transceiver types on a single die.
U.S. Pat. No. 5,537,403 describes a telecommunications packet switching architecture that implements a crossbar switch to allow communications between “devices”. However, the switch fabric itself is defined as a “single stage” network (Col. 5, lines 10-11) and as such, all ports connect to devices external to the switch fabric. Further, there is no mention of single die integration.
SUMMARY OF THE INVENTION
It is thus and object of the invention to provide a switch fabric architecture that integrates two different SERDES (ICC and HSB) transceiver type cores on a single die in order to exploit the best attributes of both SERDES transceiver types.
It is another object of the invention to provide a switch fabric architecture that integrates two different SERDES (ICC and HSB) transceiver type cores on a single die that not only allows for all of the integrated ICC SERDES links to be of the same industry standard compliance, but also allows the flexibility such that each integrated ICC SERDES link can satisfy unique protocol and interface requirements.
It is yet another object of the invention to provide a switch fabric architecture that integrates two different SERDES (ICC and HSB) transceiver type cores on a single die to function as a modular switch element for enabling the addition of switching stages to increase the number of nodes that can communicate with one another over the switch fabric.
It is a further object of the invention to provide a switch fabric architecture that integrates two different SERDES (ICC and HSB) transceiver type cores on a single die to enable communication between SERDES of the same type, via a crossbar switch and which provides protocol translations, when necessary, to enable communication between the two different SERDES types.
According to the invention, there is provided an integrated switch fabric architecture comprising: a plurality of high speed SERializer/DESerializer (SERDES) transceiver devices of a first type; and, a plurality of high speed SERDES transceiver devices of a second type, wherein the first type SERDES transceiver devices and second type SERDES transceiver devices are maximally integrated on a single IC chip die to form a modular switch element enabling communication among nodes of a network. The first type SERDES transceiver devices include SERDES devices enabling high speed data communication in an Inter-Cabinet Cabled (ICC) environment and the second type SERDES transceiver devices include SERDES devices enabling high speed data communication in a High Speed Backplane (HSB) environment. The Switch fabric architecture includes a crossbar switch device for communicating with a communications link associated with each said ICC SERDES transceiver device and HSB SERDES transceiver device for enabling communication between the links inside the modular switch element. Depending upon the protocol implemented by the crossbar switch device, the modular switch element includes an ICC protocol translator device associated with each ICC SERDES communication link for enabling bi-directional communication with the crossbar switch device if operating in accordance with a crossbar switch protocol different than an ICC link protocol; and, additionally, an HSB protocol translator device associated with each HSB SERDES communication link for enabling bi-directional communication with the crossbar switch device if operating in accordance with a crossbar switch protocol different than an HSB link protocol.
The switch fabric architecture implementing the modular switch element according to the invention provides the following advantages: maximum integration on a single die, is more cost effective, enables links to connect to industry standard interfaces, and, provides higher aggregate bandwidth, and greater connectivity with less switch fabric stages.
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Henkler, Esq. Richard A.
Scully Scott Murphy & Presser
Vincent David
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