Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2003-06-05
2004-09-07
Lam, David (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185290, C365S185160
Reexamination Certificate
active
06788580
ABSTRACT:
TECHNICAL FIELD
The present invention generally relates to semiconductor storage devices, and more particularly to a NOR-type nonvolatile semiconductor storage device formed of a virtual ground array.
BACKGROUND ART
In flash memories, in the case of performing erasing by the sector, writing is performed to all the bits in the sector before an erasing operation (hereinafter referred to as preprogramming), and thereafter, the erasing operation is performed.
In the case of performing a programming operation of writing an electric charge (electrons) to a memory cell, a verifying operation of confirming whether the electric charge is injected into the memory cell is performed, and the programming operation is repeatedly performed until the verification result becomes “PASS.” Likewise, in the case of performing an erasing operation of extracting an electric charge (electrons) from a memory cell, a verifying operation of confirming whether the electric charge is extracted from the memory cell is performed, and the erasing operation is repeatedly performed until the verifying result becomes “PASS.”
Generally, the verifying operation in the programming operation (program-verifying operation) and the verifying operation in the erasing operation (erase-verifying operation) are performed at different levels in order to secure a margin at the time of reading. The programmed cells have thresholds distributed on or above the program-verifying level, and the erased cells have thresholds distributed on or below the erase-verifying level.
As a result of a writing operation, such a state may be entered that the threshold of a cell transistor is too high (hereinafter referred to as over-programming). In NOR-type flash memories, even if over-programming occurs, the reading operation itself is not affected. However, the erasing operation has to be performed many times so as to erase a cell on which writing is deeply performed (an over-programmed cell) with the result that the other cells that are erased together are over-erased. Further, as writing is repeated, the threshold distribution after erasing broadens, which may lead to an increase in erasing time. Particularly, in a flash memory of a type storing electric charges in a nitride film, over-programming has a very significant effect on the increase in erasing time.
DISCLOSURE OF THE INVENTION
In view of the above, it is a general object of the present invention to provide a semiconductor storage device in which the above-described disadvantages are eliminated.
A more specific object of the present invention is to provide a semiconductor storage device that has a good rewriting characteristic without being affected by over-programming.
The above objects of the present invention are achieved by a nonvolatile semiconductor storage device including a memory cell array and a reference cell providing a reference level with which data of the memory cell array is compared so as to determine whether the data of the memory cell array is in an over-programmed state.
The above-described nonvolatile semiconductor storage device may further include a comparator circuit and a control circuit controlling the comparator circuit so that the comparator circuit compares the data of the memory cell array with the reference level of the reference cell, the control circuit performing an erasing operation on a memory cell in the over-programmed state in the memory cell array when a result of the comparison shows the over-programmed state.
In addition, in the above-described nonvolatile semiconductor storage device, the control circuit may control the comparator circuit so that the comparator circuit compares the data of the memory cell array with the reference level of the reference cell after writing to all bits in a sequence of operations of erasing the memory cell array is completed, the control circuit performing the erasing operation on the memory cell in the over-programmed state in the memory cell array when the result of the comparison shows the over-programmed state.
According to the above-described nonvolatile semiconductor storage device, after pre-programming in the erasing sequence, it is determined, with respect to each memory cell, whether the memory cell is over-programmed. The erasing operation is performed on the memory cell determined to be over-programmed until its over-programmed state disappears. Thereby, it can be ensured that an over-programmed memory cell state is eliminated before applying the erasing operation to the entire sector. Thereby, over-erasing due to erasing the entire sector at one time can be controlled, and the broadening of the threshold distribution after erasing can be controlled so that an increase in erasing time can be avoided. It is preferable that the over-programming detection operation be performed not after a normal writing operation but only after pre-programming. Since over-programming does not affect the reading itself of data from a memory cell, it is more time-efficient to correct over-programming in the erasing sequence.
Further, in the above-described nonvolatile semiconductor storage device, the memory cell array may include a memory cell transistor storing data by storing an electric charge in a nitride film. The memory cell transistor may store two bits independent of each other by storing an electric charge in both ends of the nitride film.
This nonvolatile semiconductor storage device employs the nitride film as an electric charge trapping layer, so that the electric charge spreads spatially in the over-programmed state. This prevents the spatially spreading electric charge from being erased sufficiently by a single erasing operation. Accordingly, the configuration of detecting and correcting over-programming according to the present invention is extremely effective in suppressing an increase in erasing time in this nonvolatile semiconductor storage device, that is, a nonvolatile semiconductor storage device using a nitride film.
The above objects of the present invention are also achieved by a method of erasing data in a nonvolatile semiconductor storage device, the method including the steps of: (a) programming all of a plurality of memory cells in a region to be erased in a memory cell array; (b) determining, with respect to each of the memory cells, whether the memory cell is in an over-programmed state by comparing data of the memory cell with a predetermined reference level; (c) causing the over-programmed state of a memory cell determined to be in the over-programmed state to disappear by performing an erasing operation on the memory cell; and (d) erasing all the memory cells in the region to be erased in the memory cell array after eliminating the over-programmed state from the entire region to be erased.
According to the above-described method, it can be ensured that an over-programmed memory cell state is eliminated before applying the erasing operation to the entire sector. Thereby, over-erasing due to erasing the entire sector at one time can be controlled, and the broadening of the threshold distribution after erasing can be controlled so that an increase in erasing time can be avoided.
REFERENCES:
patent: 5657272 (1997-08-01), Sato
patent: 6339540 (2002-01-01), Lavi
patent: 6577532 (2003-06-01), Chevallier
patent: 0 403 822 (1990-12-01), None
patent: 2000-30471 (2000-01-01), None
Arent & Fox PLLC
Fujitsu Limited
Lam David
LandOfFree
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