Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-04-01
1999-08-17
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular biasing
36518518, 36518529, 257314, 257319, G11C 1604
Patent
active
059403241
ABSTRACT:
A single-poly EPROM cell, which has spaced-apart regions of opposite conductivity formed in the base region and a thin layer of tunnel oxide, is formed in a triple-well CMOS-compatible process. By utilizing a triple-well structure and a thin layer of tunnel oxide, the cell of the present invention is both electrically programmable and erasable in a low-voltage, i.e., +3.3V environment.
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Ohnakado, T., et al., "Novel Electron Injection Method Using Band-to-Band Tunneling Induced Hot Electron (BBHE) for Flash Memory with a P-channel Cell," IEDM 1995, pp. 279-282.
Chan, T.Y. et al., "The Impact of Gate-Induced Drain Leakage Current on MOSFET Scaling," IEDM, 1987, 4 pages.
Bergemont Albert
Chi Min-hwa
Ho Hoai V.
National Semiconductor Corporation
Nelms David C.
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