Signed binary logarithm system

Details Signed binary logarithm system Signed binary logarithm system

1996-10-10

1999-08-17

Ngo, Chuong Dinh

Boots, shoes, and leggings

36471508, G06F 738, G06F 700

Patent

active

059403128

ABSTRACT:
A method and apparatus for implementing a binary logarithm of most significant bit instruction that operates on an input signed binary number. The input signed binary number includes a fixed number of successive bits with an input most significant bit and a plurality of input lower significant bits. The method individually performs an exclusive-or operation on each of the input lower significant bits with the input most significant bit. The method then inputs an output unsigned binary number to an execute unsigned logarithm of most significant bit instruction, wherein the output unsigned binary number includes a fixed number of successive bits with a zero as an output most significant bit and the result of each of the exclusive-or operations as successive output lower significant bits. The apparatus includes a plurality of two input exclusive-or gates, each with the input most significant bit connected as a first input and one of the input lower significant bits connected as a second input, and an output connected to an input of an execute unsigned logarithm of most significant bit instruction.

REFERENCES:
patent: 3831012 (1974-08-01), Tate et al.
patent: 4789956 (1988-12-01), Hildebrandt
patent: 4825400 (1989-04-01), Simoncic et al.
patent: 5216628 (1993-06-01), Mizutani et al.

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