Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2001-08-30
2004-05-18
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C324S765010, C324S763010, C323S315000
Reexamination Certificate
active
06737856
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a circuit arrangement having a load transistor and a current sensing transistor coupled to the load transistor.
In order to detect the current through a load transistor which serves for switching a load, it is known to connect in parallel with the load transistor a transistor as a current sensing transistor which is operated with the same operating point as the load transistor.
FIG. 1
shows such a circuit arrangement, also referred to as a current sense arrangement, according to the prior art.
The circuit arrangement has a load transistor T
1
S, which is connected up in series with a load Z
1
S between a supply potential Vdd and a reference-ground potential GND. Arranged in parallel with the load transistor T
1
S is a current sensing transistor T
2
S, whose gate terminal is connected to the gate terminal of the load transistor T
1
S and whose drain terminal together with the drain terminal of the load transistor T
1
S is connected to a supply potential Vdd. A series circuit comprising a transistor T
3
S and a current sensing resistor Z
2
S is connected downstream of the source terminal of the current sensing transistor T
2
S. In this case, the transistor T
3
S is driven by means of a comparator K
1
S, which compares the source potentials of the load transistor T
1
S and of the current sensing transistor T
2
S with one another in order to set them to the same value. The current I
2
through the current sensing transistor T
2
S is then proportional to the current I
1
through the load transistor T
1
S, the ratio of these two currents depending on the ratio of the dimensions of the load transistor T
1
S and of the current sensing transistor T
2
S.
It is also known for a current supplied by a current sensing transistor in accordance with
FIG. 1
to be fed to different application circuits than that illustrated in FIG.
1
. In this case, in known circuit arrangements, a dedicated current sensing transistor is provided for each of the evaluation circuits.
The load transistor and the associated current sensing transistor are usually integrated in a chip, while evaluation circuits are integrated in a further chip. In this case, a line connection is required between each of the current sensing transistors in one chip and the associated processing circuit in the other chip, which means that each of these connections requires a contact pin on the first and second chips.
SUMMARY OF THE INVENTION
It is an aim of the present invention to provide a circuit arrangement for evaluating the load current of a load transistor which can be realized simply with known circuit means and in which, in particular, the abovementioned disadvantages do not occur.
The circuit arrangement according to the invention has a load transistor and a current sensing transistor coupled to the load transistor, wherein a switch arrangement having at least one first switch is connected downstream of the current sensing transistor in order to connect the current sensing transistor to a first or second evaluation circuit depending on a control signal.
The circuit arrangement according to the invention requires only one current sensing transistor, whose output current can be fed via the switch arrangement as required to one of the evaluation circuits.
In accordance with one embodiment of the invention, it is provided that the switch arrangement can be driven depending on a load path voltage (drain-source voltage) of the load transistor. It is thus possible to provide, as an evaluation circuit, circuit components which supplement the current sensing resistor to form a conventional current sense circuit according to
FIG. 1
, the current of the current sensing resistor being fed to this evaluation circuit only until a predetermined drain-source voltage of the load transistor is reached. Conventional current sense circuits supply a current signal which is proportional to the load current only when the load transistor is not yet in saturation, in other words when the drain-source voltage is below a saturation voltage. By means of the circuit arrangement according to the invention, the current of the current sensing resistor can be fed to another evaluation circuit when the drain-source voltage reaches the value of the saturation voltage and the current of the current sensing resistor can no longer be suitably evaluated anyway in the current sense arrangement.
In accordance with a further embodiment of the invention, it is provided that the load transistor and the current sensing transistor are integrated in a first chip, and that the switch arrangement and the first and second evaluation circuits are integrated in a second chip. In this embodiment of the invention, only one line connection is required between the first chip and the second chip in order to be able to feed the load current of the current sensing resistor to the evaluation circuits.
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Cuneo Kamand
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Patel Paresh
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