Hold-up power supply for flash memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S226000, C365S228000

Reexamination Certificate

active

06735117

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
This invention generally relates to electronic systems, and more specifically relates to power supplies for computer systems.
2. Background Art
Modern life is becoming more dependent upon computers. Computers have evolved into extremely sophisticated devices, and may be found in many different applications. These applications involve everything from application specific computers found in devices such as automobiles, planes, space vehicles and other electronics, to the general purpose computers found in the form of PDAs, personal computers, servers and mainframes.
One of the main components in modern computer systems is memory. Many different types of memory products are commonly used in computer systems. Most memory used in computer is volatile, meaning that it requires power to store information. If the power is turned off, the information stored in volatile memory is lost. In certain applications, some memory in the computer system must be able to retain the information even when power is off. For these applications, a non-volatile memory is used to store the information that cannot be lost when the power is turned off.
One common type of non-volatile memory is called flash. Flash memory is used in a wide variety of applications, such as storing control code in computer systems. In flash memory an electric charge is stored on a floating gate in each cell, with the level of the electric charge determining the value for that cell. In flash memory the memory is organized so that a section of memory cells is erased in a single action or “flash”. This erase uses tunneling in which electrons pierce through a thin dielectric material to remove the electronic charge from the floating gate associated with each memory cell.
Flash memory used in critical systems must be maintained to insure that data is valid and that the status of flash memory components is known. This can be problematic in the case of power loss. In particular, when a power loss occurs during writing or erasing of flash memory, the state of the resulting data can be unknown or corrupted. This is because flash memory requires a set time period to complete erasures and write operations. If the power loss occurs before these operations are complete, the status of the memory will be unknown. This can be unacceptable in many critical systems.
Thus, what is needed is an improved method and mechanism for temporarily powering flash memory systems during power losses, ensuring that writes and erasures can complete.
DISCLOSURE OF INVENTION
The present invention provides hold-up power supply for flash memory systems. The hold-up power supply provides the flash memory system with the power needed to temporarily operate when a power loss exists. This allows the flash memory system to complete any erasures and writes, and thus allows it to shut down gracefully.
The hold-up power supply detects when a loss of power on a power supply bus is occurring and supplies the power needed for the flash memory system to operate. The holdup power supply stores power in at least one storage capacitor. During normal operation, power from a high voltage power supply bus is used to charge the storage capacitors. When a power loss is detected, the power supply bus is disconnected from the flash memory system. A hold-up controller controls the power flow from the storage capacitors to the flash memory system. The hold-up controller uses feedback to assure that the proper voltage is provided from the storage capacitors to the flash memory system. This power supplied by the storage capacitors allows the flash memory system to complete any erasures and writes, and thus allows the flash memory system to shut down gracefully.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.


REFERENCES:
patent: 5608684 (1997-03-01), Reasoner et al.
patent: 2001/0022741 (2001-09-01), Takeuchi et al.
patent: 2002/0116651 (2002-08-01), Beckert et al.

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