Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2000-07-18
2004-03-09
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C716S030000, C716S030000, C716S030000, C703S001000
Reexamination Certificate
active
06704609
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-chip semiconductor module and a manufacturing process thereof. More particularly, the present invention relates to a multi-chip semiconductor module manufacturing process for increasing the yield of the multi-chip semiconductor module, and a multi-chip semiconductor module that incorporates different functional chips.
2. Description of the Prior Art
Portability is a main development trend in the semiconductor industry. In order to reduce the overall size and weight of an electronic product, the size of a printed circuit board has to be reduced first. It has been proposed to combine semiconductor chips with different functions into a single semiconductor module, that is, the multi-chip semiconductor module.
However, poor yield of the multi-chip semiconductor module has always been a problem during mass production. When one of the semiconductor chips in the module is defective, the whole module will be affected. Moreover, detection of the defective chips is very time consuming and costly.
Accordingly, the present invention is directed to a multi-chip semiconductor module manufacturing process for increasing the yield of the multi-chip semiconductor module, and a multi-chip semiconductor module that incorporates semiconductor chips with different functions
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a process of manufacturing a multi-chip semiconductor module comprises the steps of: (a) providing a chip-mounting member including first and second substrates, the first substrate having opposite first and second surfaces, a plurality of first conductive vias that extend through the first and second surfaces, a first circuit layout patterned on the second surface and connected electrically to the first conductive vias, and a plurality of first testing points disposed on the second surface and connected electrically to the first circuit layout, the second substrate having opposite first and second surfaces, a plurality of second conductive vias that extend through the first and second surfaces of the second substrate, a second circuit layout patterned on the second surface of the second substrate and connected electrically to the second conductive vias, a plurality of second testing points disposed on the second surface of the second substrate and connected electrically to the second circuit layout, and a first chip-receiving opening formed therein; (b) mounting a first contact pad surface of a first semiconductor chip on the second surface of the first substrate, and connecting electrically a plurality of first contact pads on the first contact pad surface to the first circuit layout; (c) testing the first semiconductor chip through the first testing points of the first substrate so that replacement of the first semiconductor chip can be conducted if the first semiconductor chip is found to be defective; (d) bonding the first surface of the second substrate on the second surface of the first substrate such that the first semiconductor chip is disposed in the first chip-receiving opening and such that the second circuit layout is connected electrically to the first circuit layout through the first and second conductive vias; (e) mounting a second contact pad surface of a second semiconductor chip on the second surface of the second substrate, and connecting electrically a plurality of second contact pads on the second contact pad surface to the second circuit layout; and (f) testing the second semiconductor chip through the second testing points of the second substrate so that replacement of the second semiconductor chip can be conducted if the second semiconductor chip is found to be defective.
According to another aspect of the present invention, a process of manufacturing a multi-chip semiconductor module comprises the steps of: (a) providing a chip-mounting member including first and second substrates, the first substrate having opposite first and second surfaces, a plurality of first conductive vias that extend through the first and second surfaces, a first circuit layout patterned on the second surface and connected electrically to the first conductive vias, and a plurality of first testing points disposed on the second surface and connected electrically to the first circuit layout, the second substrate having opposite first and second surfaces, a plurality of second conductive vias that extend through the first and second surfaces of the second substrate, a second circuit layout patterned on the second surface of the second substrate and connected electrically to the second conductive vias, a plurality of second testing points disposed on the second surface of the second substrate and connected electrically to the second circuit layout, and a first chip-receiving opening formed therein; the first surface of the second substrate being bonded on the second surface of the first substrate such that the second circuit layout is connected electrically to the first circuit layout through the first and second conductive vias, and such that the second substrate does not cover the first testing points; (b) disposing a first semiconductor chip in the first chip-receiving opening, mounting a first contact pad surface of the first semiconductor chip on the second surface of the first substrate, and connecting electrically a plurality of first contact pads on the first contact pad surface to the first circuit layout; (c) testing the first semiconductor chip through the first testing points of the first substrate so that replacement of the first semiconductor chip can be conducted if the first semiconductor chip is found to be defective; (d) mounting a second contact pad surface of a second semiconductor chip on the second surface of the second substrate, and connecting electrically a plurality of second contact pads on the second contact pad surface to the second circuit layout; and (e) testing the second semiconductor chip through the second testing points of the second substrate so that replacement of the second semiconductor chip can be conducted if the second semiconductor chip is found to be defective.
According to still another aspect of the present invention, a multi-chip semiconductor module comprises: a chip-mounting member including first and second substrates, the first substrate having opposite first and second surfaces, a plurality of first conductive vias that extend through the first and second surfaces, and a first circuit layout patterned on the second surface and connected electrically to the first conductive vias, the second substrate having opposite first and second surfaces, a plurality of second conductive vias that extend through the first and second surfaces of the second substrate, a second circuit layout patterned on the second surface of the second substrate and connected electrically to the second conductive vias, and a first chip-receiving opening formed therein, the first surface of the second substrate being bonded on the second surface of the first substrate such that the second circuit layout is connected electrically to the first circuit layout through the first and second conductive vias; a first semiconductor chip disposed in the first chip-receiving opening and having a first contact pad surface mounted on the second surface of the first substrate, the first contact pad surface being formed with a plurality of first contact pads; first conductor means for connecting electrically the first contact pads to the first circuit layout; a second semiconductor chip having a second contact pad surface mounted on the second surface of the second substrate, the second contact pad surface being formed with a plurality of second contact pads; and second conductor means for connecting electrically the second contact pads to the second circuit layout.
According to a further aspect of the present invention, a process of manufacturing a multi-chip semiconductor module comprises the steps of: (a) providing a chip-mounting member including first, se
Merchant & Gould P.C.
Picard Leo
Rapp Chad
Shen Ming-Tung
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