Electric power conversion systems – Current conversion – Including automatic or integral protection means
Reexamination Certificate
2001-12-06
2004-05-18
Han, Jessica (Department: 2838)
Electric power conversion systems
Current conversion
Including automatic or integral protection means
C363S065000, C363S069000
Reexamination Certificate
active
06738270
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technique that is effective when adapted to a power source system which performs parallel power supply to a load from a plurality of power supply units, e.g., a technique that is effective when adapted to the operational power source of a server system.
2. Description of the Related Art
A system that is demanded to be always in operation, such as a server system, requires a very reliable power source system in order to avoid interruption during system operation. There is a limit to keep the reliability of the power source system with a single power supply unit. As a solution to this limit, a parallel power source system has been proposed which uses a plurality of power supply units in parallel so that even when a short circuit failure occurs in some power supply unit, the other power supply units can keep supplying power to the system or load.
FIG. 5
shows an example of the structure of the parallel power source system.
The illustrated power source system is so designed as to supply power to a single common load ZL from the output terminals of a plurality of power supply units
1
A and
1
B, so that even when one power supply unit
1
A, for example, fails, the other power supply unit
1
B can ensure power supply to the load ZL.
This parallel structure can significantly improve the reliability of power supply. In addition, a single power supply unit or a combination of fewer kinds of power supply units can cope with multifarious power supply scales. Another advantage lies in that replacement, inspection or the like of a power supply unit can be carried out while keeping supplying power to the load ZL.
The power supply units
1
A and
1
B shown in the diagram are switching control type DC power supply units which generate DC power outputs of predetermined voltages Voa and Vob from AC input supply voltages (AC 100/200 V: 50/60 Hz) Each of the power supply units
1
A and
1
B has its power input side and power output side insulated and isolated from each other on the primary side and secondary side of a high frequency transformer T, and has a feedback control path from the secondary side of the transformer T to the primary side insulated and isolated by a photo coupler Pc.
A bridge type rectifying circuit D
1
for primary rectification and smoothing, a capacitive element Cl, a switching power MOS transistor M
1
and a primary control circuit
2
which includes a PWM (Pulse Width Modulation) control circuit are provided on the power input side of each power supply unit to supply a high frequency pulse current to the primary coil of the high frequency transformer T.
MOS transistors M
2
and M
3
, which constitute a synchronous rectifying circuit, an inductance element LC and a capacitive element CL for secondary smoothing, a resistive element Rs for current detection, a secondary control circuit
3
which is linked to the primary control circuit
2
via the photo coupler Pc, and an inverse-current preventing diode D
2
are provided on the power output side of each power supply unit to rectify and smooth high frequency electromotive force induced on the secondary coil of the high frequency transformer T. The rectified and smoothed electromotive force is led to an output terminal.
The power supply units
1
A and
1
B may suffer a possible failure of a short-circuited damage on the secondary smoothing capacitive element CL. If such a failure occurs in any power supply unit
1
A or
1
B, the power supply output of the other power supply unit
1
B or
1
A is also short-circuited, causing the entire power source system to be down (inoperative). To avoid it, a diode D
2
is intervened in series in the output path in each of the power supply units
1
A and
1
B as illustrated in the diagram. The inverse-current preventing operation of the diode D
2
realizes a highly reliable parallel power source system such that even when one power supply unit
1
A fails, the other power supply unit
1
B can keep supplying power to the load ZL.
The present inventors found out that the above-described technique has the following shortcoming.
To speed up the operation information processing systems, such as a server, and reduce the consumed power thereof, the operational supply voltage of the systems has become lower, for example, from 5 V to 3 V. That is, a lower supply voltage and a large operational current are sought out. In this case, the parallel power source system should face a considerable issue of power loss caused by a voltage drop in the forward direction of the diode D
2
that prevents the inverse current. To cope with the problem, the present inventors have considered the prevention of the inverse current using a power MOS transistor M
4
which has a small voltage drop or power loss as shown in FIG.
6
.
FIG. 6
exemplifies the results of the study on the parallel power source system by the present inventors.
The illustrated parallel power source system has the power MOS transistor M
4
intervened in series in the output path in each of the power supply units
1
A and
1
B that constitutes the system, monitors output currents Ioa and Iob are monitored via the current detecting resistive element Rs and performs such control as to turnoff the MOS transistor M
4
when the direction of the current flowing in the output path in each unit
1
A or
1
B is reversed to the direction of the current flowing in the normal operation. That is, the MOS transistor M
4
is turned on or off by a current response based on the detection of the current. This ON/OFF control of the MOS transistor M
4
is performed within the secondary control circuit
3
and its control output is supplied to the gate of the MOS transistor M
4
via a gate drive circuit
31
. The above-described circuit structure forms an inverse-current preventing circuit
4
′ having a small voltage loss in each power supply unit
1
A,
1
B and can thus construct a parallel power source system with a high power efficiency.
However, the present inventors found out that while the parallel power source system shown in
FIG. 6
could reduce the voltage loss of the inverse-current preventing circuits
4
′, a supply voltage VL to be applied to the load ZL would transiently show a significant change as shown in FIG.
7
and exceeds the rated voltage range of the load ZL when the inverse-current preventing circuit
4
′ in any power supply unit should operate.
Specifically, in case where the secondary smoothing capacitive element CL in one (e.g.,
1
A) of the two power supply units
1
A and
1
B has a short circuit failure, the logical expectation is such that while the output current Ioa from that unit
1
A decreases rapidly, the output current Iob from the other unit
1
B increases so that the voltage VL to be supplied to the load ZL should be maintained constant. It was however discovered that actually the voltage VL to be supplied to the load ZL would not become constant and the load voltage VL would significantly vary in the process of compensating for a reduction in the output current Ioa of one unit
1
A with an increase in the output current Iob of the other unit
1
B. It was also found out that the variation in load voltage VL would occur due to a parasitic inductance Ls distributed in the power source wiring to the load ZL when the output current Ioa of one unit
1
A was commutated from the forward direction to the reverse direction.
Suppressing a variation in load voltage VL therefore requires that the parasitic inductance Ls should be reduced as much as possible. To fulfill the requirement, the power source wiring should be made as short as possible. Realizing the short power source wiring in the parallel power source system would raise a new problem of considerably impairing the flexibility of the system design. If the power source wiring is shortened, intervention of some sort of a parasitic inductance Ls is unavoidable. After all, it was not possible to fundamentally overcome the problem with the shortening of the power source wiring.
SU
Hamaogi Masahiro
Saga Ryohei
Tokunaga Norikazu
Antonellli, Terry, Stout & Kraus, LLP
Han Jessica
Renesas Technology Corporation
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