Methods and apparatus for signal processing

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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C327S074000

Reexamination Certificate

active

06798264

ABSTRACT:

FIELD OF INVENTION
The present invention generally relates to electronic circuits.
BACKGROUND OF THE INVENTION
Many electronic devices use binary signals to communicate among components. For example, many electronic systems use logical ones and zeros to signify data and operations. The logical ones and zeros are communicated in the form of electrical signals having one of two values. Consequently, such systems rely on stable signals having one of the two values.
Unstable signals tend to disrupt communications by varying the signal. Any signal exhibiting a value other than the accepted binary values may be interpreted incorrectly by the receiving component. Several causes may contribute to unstable signals, such as reflections due to impedance mismatches among connections. In some cases, instability may be present in the form of ringback, manifested by a sharp deviation away from the intended signal value as a relatively large reflection interferes with the original signal until the signal stabilizes.
To compensate for unstable signals, binary circuits typically use high-gain amplifiers having rail voltages at the two desired binary values to receive input signals. For example, a conventional input circuit may comprise a differential amplifier having a first input connected to the input signal and a second input connected to a reference voltage, such as a voltage level midway between the rail voltages. If the input signal is even slightly higher than the reference voltage, the amplifier tends to amplify the difference and generate an output signal at the high rail voltage. Likewise, if the input signal is below the reference voltage, the amplifier generates an output signal at the low rail voltage.
Conventional differential amplifier circuits may still be subject to unstable signals.
For example, if the magnitude of a ringback voltage is high enough, the unstable signal may again cross the reference voltage, generating an unwanted pulse from the differential amplifier. In addition, some circuit topologies tend to cause the input signal to fluctuate as it approaches the midpoint between the rail voltages. Consequently, instead of the output signal switching from one extreme to another, the differential output signal may include multiple unwanted pulses as the input signal fluctuates near the midpoint.
To reduce the susceptibility to noise, some circuits use hysteresis to provide multiple reference voltages. For example, a circuit may use a Schmitt trigger to receive the input signal, which switches the output negative when the input signal crosses a high threshold. The Schmitt trigger then uses negative feedback to prevent switching back to the lower state until the input signal crosses a low threshold voltage.
Such hysteresis configurations, however, tend to exhibit inaccurate thresholds.
Further, a hysteresis configuration may slow the responsiveness of the system. At each edge, reaching the threshold voltage requires a greater change in the input signal voltage, which requires greater time to reach the threshold. Consequently, though hysteresis systems may exhibit improved noise resistance, such systems are also less responsive and may be inaccurate.
SUMMARY OF THE INVENTION
A method and apparatus for signal processing according to various aspects of the present invention includes an electronic circuit comprising a receiver configured to receive a signal and a dynamic threshold circuit configured to process the signal. The dynamic threshold circuit is configured to compare the signal to a threshold and generate an output signal according to the comparison. The dynamic threshold circuit is also configured to change the threshold to a selected level at a selected time. In various embodiments, the selected level is selected to be a level between the level of the input signal and a midpoint of the input signal. In another embodiment, the selected time is selected to correspond to a stabilization time of the input signal.


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JAZio Test Chip Results; Test chip database for 0.18u and documentation. 11 pgs.
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JAZio—Presentation —Last Updated: Sep. 25, 1999.
JAZio—Presentation—Last Updated: Nov. 2, 1999.

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