Semiconductor device manufacturing: process – Repair or restoration
Reexamination Certificate
2002-04-18
2004-03-09
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Repair or restoration
C438S059000, C438S048000, C257S295000
Reexamination Certificate
active
06703249
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic random access memory (MRAM) and a method of manufacturing the same. More particularly, the present invention relates to an MRAM whose memory cells respectively include two magnetic layers separated by a tunneling barrier layer, and a method of manufacturing the same.
2. Description of the Related Art
An MRAM, which integrates ferromagnetic layers to store digital data, is one of the promising nonvolatile memories. The MRAM stores digital data as directions of spontaneous magnetizations of the ferromagnetic layers. The directions of the spontaneous magnetizations are not reversed until an external magnetic field is applied to the ferromagnetic layers, and this achieves nonvolatile storage of the digital data in the MRAM.
To improve operation and structure of MRAMs, use of the tunnel magnetroresistance (TMR) effect has been proposed. The memory cell whose operation is based on the TMR effect includes two ferromagnetic layers separated by an insulating layer. The insulating layer is so thin that a tunneling current is allowed to pass though the insulating layer. The insulating layer typically has a thickness of about 1.5 nm. The TMR effect causes the resistance of the insulating layer to be changed depending on whether the spontaneous magnetizations of the two magnetic films are “parallel” or “antiparallel”. The change in the resistance allows the detection of the data stored in the memory cells.
The method of manufacturing the MRAM based on the TMR effect is disclosed in Japanese Laid Open Patent Application (JP-A 2000-353791).
FIGS. 1A
,
1
B and
1
C schematically show the conventional method of manufacturing the MRAM. As shown in
FIG. 1A
, a silicon oxide film
102
, an aluminum film
103
, a first magnetic film
104
, an insulating film
105
and a second magnetic film
106
are formed in series on a substrate
101
. A thickness of the insulating film
105
is so thin that a tunneling current passes through the insulating film
105
.
After forming a photoresist
107
on the second magnetic film
106
, as shown in
FIG. 1B
, the second magnetic film
106
, the insulating film
105
and the first magnetic film
104
are etched with the photoresist
107
used as a mask. The etching fabricates a lower magnetic layer
104
′, a tunneling barrier layer
105
′ and an upper magnetic layer
106
′. The lower magnetic layer
104
′, the tunneling barrier layer
105
′ and the upper magnetic layer
106
′ constitute a memory cell. After the formation of the memory cell, as shown in
FIG. 1C
, the aluminum film
103
is etched to form a lower electrode
103
′.
The conventional method causes mechanic stress to be applied to the insulating film
105
and the mechanical stress induces defects in the tunneling barrier layer
105
′. The mechanical stress is generated in various ways in the process for manufacturing the MRAM. For example, the fixation of the substrate
101
to a manufacturing apparatus causes mechanical stress to be applied to the tunneling barrier layer
105
′. Moreover, thermally-induced mechanical stress is applied to the insulating film
105
because of the difference between thermal expansion coefficients of the substrate
101
, the silicon oxide film
102
, the lower electrode
103
, the first magnetic film
104
, the second magnetic film
106
and the insulating film
105
. The mechanical stress induces defects in the insulating film
105
and the induced defects may cause operational errors of the MRAM and thus degrade the reliability of the MRAM.
The stress-induced defects are desirably excluded from the tunneling barrier layer in the memory cell.
Another method of manufacturing an MRAM is disclosed in U.S. Pat. No. 6,153,443. In the other conventional method, a tunnel insulating film is discontinuously deposited between two magnetic films.
Furthermore, a method of manufacturing a thin film magnet head, which may be related to the present invention, is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 7-235016). In the document, it is disclosed that a curved insulating film is formed between two magnet films.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a magnetic random access memory for excluding stress-induced defects in a tunneling barrier layer included in a memory cell, and a method of manufacturing the same.
Another object of the present invention is to provide a magnetic random access memory for concentrating a magnetic field to the memory cell during write operation, and a method of manufacturing the same.
In order to achieve an aspect of the present invention, a method of manufacturing a magnetic random access memory is composed of:
forming a first magnetic film over a substrate,
forming a tunnel insulating film on the first magnetic film such that the tunnel insulating film has a curvature,
forming a second magnetic film on the tunnel insulating film, and
etching the first magnetic film, the tunnel insulating film and the second magnetic film to form a memory cell. The etching is executed such that the curvature is excluded from the memory cell.
In order to achieve another aspect of the present invention, a method of manufacturing a magnetic random access memory is composed of:
forming a step-structured member over a substrate, wherein the step-structured member has first and second surfaces substantially parallel to a substrate surface of the substrate, a first distance between the first surface and the substrate surface being different from a second distance between the second surface and the substrate surface;
forming a first magnetic film on the step structure;
forming a tunnel insulating film on the first magnetic film such that the tunnel insulating film has a curvature; and
etching a portion of the tunnel insulating film to form a tunneling barrier layer, wherein the whole of the tunneling barrier layer is located over the first surface.
The first distance is preferably larger than the second distance.
The step-structured member preferably has a third surface which bridges the first and second surfaces, the third surface being substantially perpendicular to the first and second surfaces.
In order to achieve still another aspect of the present invention, a method of manufacturing a magnetic random access memory comprising:
forming a conductive portion on a substrate, the conductive portion having a conductive portion surface substantially parallel to a substrate surface at a first distance from the substrate;
forming an insulating portion on the substrate wherein the insulating portion has a insulating portion surface substantially parallel to the substrate at a second distance from the substrate, the first and distances being different from each other;
forming a first magnetic film on the conductive and insulating portions;
forming a tunnel insulating film on the first magnetic film;
forming a second magnetic film on the tunnel insulating film; and
etching a portion of the tunnel insulating film to form a tunneling barrier layer wherein the whole of the tunneling barrier layer is located over the conductive portion.
The formation of the insulating portion is preferably executed by the steps of:
forming an insulating film covering the conductive portion;
removing a surface portion of the insulating film to flatten the insulating film; and
etching back another portion of the flattened insulating film to form the insulating portion.
The method is preferably further composed of:
forming a magnetic portion between the conductive portion and the substrate.
In order to achieve still another aspect of the present invention, a method of manufacturing a magnetic random access memory is composed of:
forming a step-forming portion over a substrate;
forming a lower electrode to cover the step-forming portion and the substrate such that the lower electrode is protruded in a direction perpendicular to a substrate surface by the step-forming portion;
forming a firs
Numata Hideaki
Okazawa Takeshi
Everhart Caridad
Katten Muchin Zavis & Rosenman
NEC Electronics Corporation
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