Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
1999-12-02
2004-01-06
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S263000, C257S264000, C257S287000
Reexamination Certificate
active
06674107
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the rectifying of alternating current (AC) into direct current (DC) by a normally “offs” Junction Field Effect Transistor (JFET) that provides very low voltage drop across the source and drain for AC to DC power supplies or converters in low voltage application. The gate of this device is connected to the higher voltage terminal of three output terminals of the transformer. The gate turns-on the JFET when the gate is in forward bias above the threshold voltage of the normally “off” JFET. Since the threshold voltage of this normally “off” JFET can be set below 0.3V and the forward bias of 0.5V or less at the gate can sufficiently turn-on the device, a very low voltage drop to below 0.1 V across source and drain of the device can be realized at on state of this device. The current required to switch the device is only two to five times of orders of magnitude smaller than the current across the source and drain. Therefore very efficient rectifying for low voltage application is achieved.
2. Description of the Prior Art
As the technology moves toward deep submicron ranges, the required power supply voltage is decreased from 2.5V for 0.25 micron technology to under 1.0V for 0.13 micron or advanced technology. A Normal P-N junction with a forward voltage drop of 0.8 V to over 1.0 V is no longer adequate for power supplies with output voltages of 5.0 V or lower due to its high power consumption during forward current flow. The standard Schottky rectifier is also not adequate for a power supply voltage below 3.3 V. Special Schottky rectifiers offer a low forward voltage drop of about 0.3 V, however, this kind of Schottky rectifier is limited to 100 degree C. maximum junction temperature and its high reverse leakage current becomes unattractive to many applications.
The concept of Junction Field Effect Transistors (JFET) has been proposed after the invention of bipolar transistors. Due to its majority carrier nature, the JFET can be operated at very high frequency. However, because of its physical properties, this kind of device is only available in the market for normally “on” JFET. This means that the normally “on” JFET is at “on” state when there is no bias applied to the gate. At the reverse bias higher than the threshold voltage Vt, the gate turns off the current flow between source and drain. Without readily available normally “off” JFETs, JFETs are not widely used as the MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). In order to make the normally “off” FET, the distance between the gates must be small enough so that the depletion regions from both gates fill up the conduction channel. No current flows when the gate is at zero bias. This means that at forward bias above the threshold voltage of the gate, the depletion region is small enough, the conduction channel between source and drain is then open.
S. M. Sze has clearly described this concept in page 323, “Physics of Semiconductor Devices”, 2
nd
edition, John Wiley & Son, 1981. The symbols for n-type and p-type normally “on” and normally “off” JFET and MESFET are illustrated in FIG.
1
. However, in this book, the application of normally “off” FET is described for high speed and low power application. Since the original device structure has very long channel length that limits the current carrying capability and high on resistance.
From inventor's previous invention concepts, “Low On Resistance Transistors and the Method of Making” filed in Patent Office of Disclosed Document Program, Sep. 24, 1998, #444899, has disclosed the device structure for high current and low on resistance applications. This is a normally “on” JFET that offers high current and low on resistance for low voltage applications. Inventor's other concept, “Novel Structure of JFETs for Low Voltage Application”, filed/in Patent Office of Disclosed Document Program, Sep. 17, 1998, #444874 disclose/d the device structure of normally “off” JFETs for low voltage and high current applications. The provisional patent application, No. 60/115,009, has been filed on Jan. 6, 1999 and utility patent application, was filed on Oct. 28, 1999.
SUMMARY OF THE PRESENT INVENTION
From the inventor's previous invention concepts, 1) “Low On Resistance Transistors and the Method of Making”, filed in the Patent Office Disclosure Document Program, Sep. 24, 1998, #444899, has disclosed the device structure for high current and low on resistance applications. This is a normally “on” JFET that offers high current and low on resistance for low voltage applications. The Inventor's other concept, “Novel Structure of JFETs for Low Voltage Application”, filed in the Patent Office Disclosure Document Program, Sep. 17, 1998, #444874, disclosed the device structure of normally “off” JFETs for low voltage and high current applications. The above two documents have been combined together to file a provisional patent application, No. 60/115,009 on Jan. 6, 1999 and a subsequently filed utility patent application Ser. No. 09/430,500 on Oct. 29, 1999. The full disclosures of application Ser. No. 60/115,009 and application Ser. No. 09/430,500 are incorporated herein by reference.
This invention offers simple circuits connecting to the output side of the transformer by utilizing the normally “off” JFET for half wave or full wave rectifying. Similar approach can also apply to other complicated circuitry.
REFERENCES:
patent: 3381188 (1968-04-01), Zuleeg et al.
patent: 4404575 (1983-09-01), Nishizawa
Loke Steven
Lovoltech Inc.
Wagner , Murabito & Hao LLP
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