Communications: electrical – Condition responsive indicating system – Specific condition
Reexamination Certificate
2002-01-31
2004-03-23
La, Anh V (Department: 2636)
Communications: electrical
Condition responsive indicating system
Specific condition
C330S277000, C324S762010
Reexamination Certificate
active
06710716
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a power detector used in a communication apparatus for transmitting and receiving high frequency signals, or a measurement device for measuring signal levels of high frequency signals, and a demodulator using the same.
BACKGROUND ART
In a conventional high frequency power detector, a Schottky barrier diode has often been mainly used.
FIG. 1
is circuit diagram of an example of the configuration of a conventional high frequency power detector using the diode.
As shown in
FIG. 1
, this high frequency power detector
1
is comprised of a diode D
1
as an active element, a DC bias resistor R
1
, a capacitor C
1
, and a load resistor RL
1
.
An anode of the diode D
1
is connected to an input terminal Tin
1
of a high frequency signal RFin and one end of the resistor R
1
, while a cathode thereof is connected to an output terminal Tout
1
, one electrode of the capacitor C
1
for removing a high frequency component, and one end of the load resistor RL
1
. The other ends of the resistors R
1
and RL
1
and the other electrode of the capacitor Cl are grounded.
In the high frequency power detector
1
having such a configuration, the high frequency signal RFin is input to the input terminal Tin
1
. By a rectification function of the diode D
1
and the capacitor C
1
having a sufficiently large capacitance, an envelope component of the input high frequency signal is output as a detection output signal Vout.
In the high frequency power detector
1
, it is required to linearly obtain the detection output voltage Vout from a signal level as low as possible to a signal level as high as possible, that is in a wide dynamic range.
FIG. 2
is a diagram of an example of characteristics of the high frequency power detector using a diode as an active element.
This example plotted the relationship of the output voltage Vout with respect to an input high frequency power Pin obtained when a Schottky barrier diode was used, a bias voltage Vd of the diode D
1
in
FIG. 1
was set at 0V (Vd=0V: zero bias), and the frequency of the high frequency signal was 10 GHz.
The conventional power detector using a Schottky barrier diode having such a characteristic has the following disadvantages.
In order to raise the detection performance, the circuit is produced by using a special semiconductor process. Accordingly, the conventional power detector is not suited for an integrated circuit.
For this reason, the conventional power detector has to have a hybrid configuration. This induces a rise of production costs, a restriction of the operation band, and an increase of production variability.
When the power detector is comprised by a semiconductor process enabling circuit integration, the detection characteristic thereof is deteriorated.
In recent years, there have been strong demands for reduction of size and lowering of price of mobile phones and other wireless communications devices. Circuit integration is important as a means for responding to such demands.
Therefore, in order to obtain a high performance, high frequency power detector suited for circuit integration, a power detector using a field effect transistor (FET) as an active element has been investigated (for example, the above document).
FIG. 3
is a circuit diagram of an example of the configuration of a conventional high frequency power detector using a silicon (Si) MOSFET.
As shown in
FIG. 3
, this high frequency power detector
2
is comprised of a field effect transistor (hereinafter, simply referred to as a “transistor”) Q
1
, resistors R
2
and R
3
, capacitors C
2
and C
3
, a voltage source V
1
, and a load resistor RL
2
.
In this high frequency power detector
2
, a gate of the transistor Q
1
is biased by a bias supply circuit comprised of the voltage source V
1
, resistor R
3
, and the capacitor C
2
. The input high frequency signal RFin is propagated through the transistor Q
1
having a predetermined resistance between the drain and the source, and an envelope component of the input high frequency signal is output as the detection output signal Vout by the capacitor C
3
having a large capacitance on the output side.
However, the high frequency power detector of
FIG. 3
has the following disadvantages.
Since it uses an SiMOSFET, the maximum operation frequency is low, i.e., the 1.5 GHz band.
Also, as shown in
FIG. 4
, there is room for improvement of linearity of the input power versus detection output voltage characteristic (Mohamed RATNI, Bernard HUYART, et al., “RF Power Detector using a Silicon MOSFET”, International Microwave Symposium, 1998).
Also, in the power detector
2
, where the output format is the single end system and the latter stage of the linear detector has a balance input, an additional unbalance/balance conversion circuit becomes necessary.
FIG. 5
is a circuit diagram of another example of the configuration of the high frequency power detector using a field effect transistor as an active element (refer to Japanese Unexamined Patent Publication (Kokai) No. 10-234474).
As shown in
FIG. 5
, this high frequency power detector
3
is comprised by a transistor (FET) Q
2
, a DC cutting capacitor Cin, a bias resistor R
4
, voltage sources V
2
and V
3
, a load resistor RL
3
, an output side capacitor C
4
, a coupling capacitor Cd, and an inductor Ld. A gate bias supply circuit
3
a
is comprised by the resistor R
4
, while a drain bias supply circuit
3
b
is comprised by the inductor Ld.
In this high frequency power detector
3
, the high frequency signal RFin input to an input terminal Tin
3
is supplied via the DC cutting capacitor Cin to the gate of the transistor Q
2
. The gate of the transistor Q
2
is supplied with the gate bias voltage of the gate bias supply circuit
3
a
connected to the voltage source V
2
for supplying a voltage Vgg. Also, the drain of the transistor Q
2
has connected to it the drain bias supply circuit
3
b
for supplying the drain bias voltage. Note that the voltage source V
3
for supplying a DC voltage Vdd is connected to the drain bias supply circuit
3
b.
A coupling capacitor Cd having a sufficiently large capacitance value is connected between the drain of the transistor Q
2
and a ground potential GND. The resistor RL
3
and the coupling capacitor C
4
having a sufficiently large capacitance value are connected in parallel between the source of the transistor Q
2
and the ground potential GND. Then, a potential difference Vout between the transistor Q
2
and the ground potential GND becomes the detection output signal.
FIG. 6
shows the detection characteristics of the high frequency power detector of FIG.
5
.
This power detector
3
enables the realization of a detector of a small size and low cost and adapted to broadband high frequency operation, but has the following disadvantages.
As shown in
FIG. 6
, the fluctuation of the detection output voltage versus input power characteristic is large compared with the gate-source bias fluctuation.
As shown in
FIG. 6
, depending on the bias conditions, sometimes a DC offset occurs.
When a pinchoff voltage of the transistor Q
2
fluctuates due to a production variability, temperature fluctuation, etc., the fluctuation of the detection output voltage versus input voltage characteristic is large.
Also, in the power detector
3
, when the output format is the single end system and the latter stage of the linear detector has a balance input, an additional unbalance/balance conversion circuit becomes necessary.
DISCLOSURE OF THE INVENTION
The present invention was made in consideration of such a circumstance and has as an object thereof to provide a high performance power detector not only suited for monolithic structures, small in size, low in cost, and suited for broadband high frequency operation, but also excellent in the linearity of the detection characteristic relative to the bias fluctuation, having a small fluctuation of the detection characteristic relative to the FET threshold voltage fluctuation, having a small DC offset, and not requiring an a additional circuit even when
Abe Masayoshi
Brankovic Veselin
Krupezevic Dragan
Sasho Noboru
Kananen Ronald P.
La Anh V
Rader & Fishman & Grauer, PLLC
Sony Corporation
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