Intelligent universal connector

Details Intelligent universal connector Intelligent universal connector

2002-09-06

2004-07-13

Zarroli, Michael C. (Department: 2839)

Electrical connectors

With flaccid conductor and with additional connector spaced...

C710S062000, C439S955000

Reexamination Certificate

active

06761580

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a universal connector and, more particularly, to an intelligent universal connector compatible to IDE (Integrated Drive Electronics) parallel ATA's 40-pin signal connector and serial AT attachment 7-pin signal connector.
2. Description of the Related Art
An IDE interface is a PC (personal computer)-to-storage medium (hard diskdrive or CD-ROM player) connection interface made in the form of a 40-pin socket or plug. As illustrated in
FIG. 1
, the 40 pins of an IDE interface are arranged in two lines, each having 20 pins. Therefore, an IDE interface is also called “parallel ATA specification”.
Following fast development of new technology and strong demand for high signal transmission speed and high stability in signal transmission, serial ATA (SATA) standard has been established to fit IDE interface. This SATA standard, as shown in
FIG. 2
, is a 7-pin signal standard defined as follows: the first, fourth and seventh pins are grounding (GND), the second and third pins are HTX_P and HTX_M input/output signal; the fifth and sixth pins are HRX_P and HRX_M input/output signal. Because of the advantages of serial type signal transmission of fast transmission speed of low number of pins, SATA connectors will soon take over 40-pin connectors.
Currently, parallel ATA and serial ATA standards coexist in the market. The coexistence of these two standards in the market brings a great impact on computer peripheral apparatus. For example, a mobile computer peripheral rack has an IDE interface compatible 50-pin connector located on the outer rack and an IDE interface compatible 50-pin connector located on the inner box. When the two IDE interface compatible 50-pin connectors electrically connected, signal I/O is provided between the external computer and the internal storage medium (hard diskdrive). As illustrated in
FIG. 3
, the 50 pins of an IDE interface compatible 50-pin connector are defined as follows: the first and the 26
th
pins are +12V power source; the second, third, 27
th
and 28
th
pins are grounding (GND); the fourth and 29
th
pins are +5power source; the fifth and 30
th
pins are non; the pins numbered from 6~25 and the pins numbered from 31~50 are parallel 40-pin signal. The signals of the second, 19
th
, 22
nd
, 24
th
, 26
th
, 30
th
and 40
th
pins shown in
FIG. 1
correspond to the grounding terminals of the 31
st
, 15
th
, 41
st
, 42
nd
, 43
rd
, 45
th
, and 50
th
pins shown in FIG.
3
. If the storage medium installed in the inner box is a hard diskdrive fitting parallel ATA standard, it is not compatible to the serial ATA connector on the outer rack. Connecting these two non-compatible connectors together may cause the computer to down, or bring a severe damage to the motherboard.
SUMMARY OF THE INVENTION
The present invention has been accomplished under the circumstances in view. It is therefore the main object of the present invention to provide an intelligent universal connector, which is compatible to IDE (Integrated Drive Electronics) parallel ATA's 40-pin signal connector and serial AT attachment 7-pin signal connector. According to the present invention, the intelligent universal connector comprises 50 pins arranged into a left row of pins and a right row of pins parallel to the left row of pins. The pins of the right row of pins are numbered from 1
st
through 25
th
in direction from the top side toward the bottom side. The pins of the left row of pins are numbered from 26
th
through 50
th
in direction from the top side toward the bottom side. The 1
st
and 26
th
pins are +12V power source. The 4
th
and the 29
th
pins are +5V power source. The 2
nd
, 3
rd
, 27
th
and 28
th
pins are grounding. The 5
th
and 30
th
pins are non. The pins of 6
th
through 25
th
and the pins of 31
st
through 50
th
correspond to parallel ATA standard. The 41
st
, 42
nd
, 43
rd
and 45
th
pins are the two I/O signal terminals (HTX_P, HTX_M and HRX_P, HRX_M). The 28
th
, 3
rd
and 2
nd
pins are connectable to the 1
st
, 4
th
and 7
th
pins of a 7-pin serial ATA connector. The 41
st
, 42
nd
, 43
rd
and 45
th
pins are connectable to the two I/O signals of a 7-pin serial ATA connector. The 41
St
, 42
nd
, 43
rd
and 45
th
pins correspond to grounding terminals of a parallel ATA connector.


REFERENCES:
patent: 6006295 (1999-12-01), Jones et al.
patent: 6418501 (2002-07-01), Gama et al.
patent: 6546440 (2003-04-01), Verinsky et al.
patent: 6563714 (2003-05-01), Chang
patent: 2002/0049887 (2002-04-01), Takahashi

Affiliated with

Also associated with

Rating

Intelligent universal connector does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Intelligent universal connector, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Intelligent universal connector will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3202836