Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-09-19
2004-03-09
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000
Reexamination Certificate
active
06703995
ABSTRACT:
The present invention concerns a display utilizing a chiral nematic reflective bistable liquid crystal material, and a method of driving such a display. This material is also described as cholesteric. In particular, the invention relates to an active matrix pixel arrangement and drive scheme.
Cholesteric liquid crystal material is a reflective material that provides a strongly colored binary image. The material is bistable, has a very wide viewing angle and does not require polarisers, color filters or rubbing as do super twisted nematic (STN) type displays. Therefore, the material can provide a low power and low cost display at high resolution and with a good quality single color image. This type of display is being proposed for hand-held portable devices as well as for electronic document viewers, such as electronic book or newspaper devices.
Cholesteric materials have three stable states. The Planar (P) state is a reflective state of the material, and is stable with zero applied field. The Focal Conic (FC) is a transmissive scattering state of the material, and is also stable with zero applied field. The Homeotropic (H) state is stable only above a high threshold voltage of around 30V, and is also transparent. A black absorbing layer placed behind the material means that the H and FC states appear black.
A fourth, instable, state also exists, which can occur upon relaxation of the material from the H state. This is called the Transient Planar (P*) state. This state only arises if the high voltage on the material in the H state is reduced rapidly, for example in 2 ms or less. The Transient Planar state relaxes to the Planar state (P) in the absence of applied voltages.
In use of the material, a drive scheme is devised to switch the material between the P and FC states, which are stable at zero applied voltage. A first problem arises because any transition between the P and FC states requires the material to pass through the high-voltage H state. Therefore, known passive matrix switching schemes require rapid high voltage switching. Conventional drive schemes are arranged such that each time a pixel is addressed, a transition in the material is provoked into the H state. This means that pixels in the reflective P state are caused to pass through the transmissive H state, even if the pixel is to be driven to the reflective P state in the next field period. This gives rise to a visual artifact known as a black addressing bar.
A further problem with this material results from the slow response time. For example, voltages need to be applied for at least 20 ms to enable state transition of the material into the H state. The material also has strong temperature dependence.
The bistable nature of the material at zero applied voltage means a display using the material does not require continuous updating or refreshing. If display information does not change, the display can be written once and remain in its information-conveying configuration for extended periods with no power consumption. This has resulted in use of cholesteric liquid crystal displays for images that can be slowly updated over relatively long periods of time. However, the problems outlined above, particularly the slow addressing response, have limited the further development of this display technology in wider fields of application.
U.S. Pat. No. 5,748,277 discloses a passive matrix addressing scheme for cholesteric displays which seeks to reduce the addressing time. The scheme relies upon the rapid transition from the H state to the P* state. If there is rapid voltage turn-off, a transition to the P* is achieved (and in turn a transition to the P state), whereas if there is slow voltage turn off, then a transition to the FC state takes place.
The drive scheme provides an address voltage profile which has three phases. These three phases are known as “preparation”, “selection” and “evolution”. The preparation phase places the liquid crystal material in the Homeotropic state, and is achieved by applying a high voltage, typically 35V, to the row of pixels for about 50 ms. The selection phase is only 1 ms long and dictates whether there is rapid or slow voltage turn off. The voltage applied to the row is typically 7V, and the column voltage is in the range −3V to +3V. During this phase, the voltage applied to the column determines which state the pixel will end up in. The evolution phase allows the liquid crystal material to relax to the Planar or Focal Conic state, as determined by the preceding selection phase. During this phase, a voltage of 25V may be applied, typically for 40 ms. At the end of the three phase process, the voltage across the liquid crystal material is returned to zero.
The preparation and evolution phases can be carried out simultaneously for adjacent rows, so that, for a large number of rows, the average row address period will tend towards the selection phase duration of 1 ms.
In common with other liquid crystal materials, the LC state is determined by the RMS voltage across the LC cell, whereas the average voltage across the cell should be zero to prevent electrochemical degradation. For this purpose, the row voltages are arranged as AC pulse trains so that the RMS voltage is non-zero, whereas the average voltage is zero. Typically, the frequency of the row voltage signals will be 1000 Hz, so that the selection phase comprises a single wavelength signal of 1 ms duration. This imposes a large number of high voltage transitions on the row electrodes which consume power.
Whilst this three-phase addressing scheme improves the addressing time, it does not address the other issues of rapid high voltage switching or of the black addressing bar.
According to the invention, there is provided a display apparatus comprising:
a layer of bistable chiral nematic liquid crystal material
an active matrix substrate defining rows and columns of pixel address circuits, each pixel address circuit having an output for applying a signal to a respective portion of the liquid crystal material,
wherein each pixel address circuit comprises
a first switching device for switching a supply voltage to the remainder of the pixel address circuit and which is controlled by a row address line;
a second switching device for allowing or preventing the supply voltage to be provided to the respective portion of the liquid crystal material, and controlled by a column select line.
The switching devices of the pixel enable a transition to the H state to be avoided when the material is to remain in the P or FC states. In particular, if transition from the P state to the H state is avoided, the black addressing bar artifact can be avoided. The use of row address line for the control of the first switching device and a column select line for control of the second switching device enables the supply of the supply voltage to individual pixels to be controlled independently. The supply voltage is the voltage required to cause a transition of the cholesteric material to the H state.
A third switching device may be provided for switching a selection voltage to the pixel address circuit and which is controlled by a second row address line, the selection voltage being provided on a column line, the second switching device allowing or preventing the selection voltage to be provided to the respective portion of the liquid crystal material. This enables the selection phase to be implemented, but the second switching device still enables the voltage profile of the selection phase to be inhibited from reaching the liquid crystal material.
A fourth switching device may be provided for switching a ground voltage to the liquid crystal material and which is controlled by a third row address line. This maintains the pixel in the stable zero voltage state at the end of the phase transitions within the material.
A signal on the column select line may be provided to a sample and hold circuit, so that a short time is required to provide the signal to the pixel. This enables the column select line to provide signals for different rows of pixels in
Bird Neil C.
Fish David A.
Koninklijke Philips Electronics , N.V.
Patel Nitin
Shankar Vijay
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