Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2003-02-05
2004-04-13
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S125000, C438S126000, C438S110000, C257S690000, C257S692000, C257S701000, C257S773000
Reexamination Certificate
active
06720205
ABSTRACT:
Japanese Patent application No. 2002-60311, filed on Mar. 6, 2002, is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
The present invention relates to an electronic device and method of manufacturing the electronic device, and to an electronic instrument.
In a liquid crystal panel, for the electrical connection of an IC chip having a drive circuit, TAB (Tape Automated Bonding), COF (Chip On Film) mounting, or COG (Chip On Glass) mounting is applied.
With conventional TAB (Tape Automated Bonding) or COF (Chip On Film) mounting, interconnecting lines formed on the tape or film are bonded to interconnecting lines of the liquid crystal panel. Since the liquid crystal panel has a large number of interconnecting lines formed at a narrow pitch, and the tape or film tends to expand or contract, positioning discrepancies of the bonding portions of the interconnecting lines tend to occur. For this reason, it has been difficult to assure the electrical connections. Using conventional COG (Chip On Glass) mounting, a semiconductor chip is mounted on the liquid crystal panel, and therefore a large mounting area (a so-called frame) has been necessary.
BRIEF SUMMARY OF THE INVENTION
A method of manufacturing an electronic device of the present invention comprises:
electrically connecting first interconnecting lines provided on a first support member respectively to a first group of electrodes of an integrated circuit chip; and then
electrically connecting second interconnecting lines provided on a second support member respectively to a second group of electrodes of the integrated circuit chip, the second support member having a rate of deformation due to at least one of heat and humidity less than the deformation rate of the first support member, and the second group of electrodes having a pitch less than the pitch of the first group of electrodes of the integrated circuit chip.
An electronic device of the present invention is manufactured by the above described method.
An electronic instrument of the present invention comprises the above described electronic device.
REFERENCES:
patent: 2003/0049887 (2003-03-01), Wada et al.
patent: 08-139126 (1996-05-01), None
U.S. patent application Ser. No. 10/361,839 Hashimoto filed Feb. 10, 2003.
Hogan & Hartson LLP
Novacek Christy
Seiko Epson Corporation
Zarabian Amir
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