Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2000-09-21
2004-03-16
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S142000
Reexamination Certificate
active
06707323
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device capable of automatically adjusting the output-voltage level upon power-on or in response to reception of a predetermined signal. This invention also relates to a module having a plurality of such semiconductor devices mounted on a board and a system having a,plurality of such modules installed therein, both the module and system being capable of automatically adjusting the output-voltage level upon power-on or in response to reception of a predetermined signal.
2. Description of the Related Art
The operation speed of CPUs in personal computers or the like become faster every year, and the frequency of signals to be output on a data bus line of a system become higher every year. To transfer high-frequency signals on a data bus line, it is necessary to narrow the amplitude of an output signal to be output on the data bus line. The important factor in this case is the precision of the output-voltage levels with respect to logic “0” and logic “1”. The precision of the output-voltage levels is essential in accurately transmitting and receiving signals with a narrow amplitude between a data sender side and a data receiver side.
When the amplitude of a signal on the data bus line is sufficiently wide, there are large margins between the threshold level which distinguishes the H level from the L level and the H level and L level of a signal which is actually output from a semiconductor device. Even if there is some variation in the H level and L level of a signal, therefore, it is possible to adequately detect the H level and L level. Narrowing the amplitude of signals in order to ensure a high frequency narrows the aforementioned margins so that a variation in the H level and L level cannot be allowed.
The output-voltage level of a semiconductor device is generally set through simulation at the design phase. However, the output-voltage level of an actual product varies due to a variation in the performance or the like of transistors in the semiconductor device which is originated from a variation in the fabrication process. At the conventional relatively low data bus frequency (e.g., around 100 MHz), the specified values could be satisfied even with that variation. At a future higher data bus frequency (e.g., 200 MHz or higher), however, the amplitude of a signal becomes narrower, so that the variation in the output-voltage level may make a data transmission and reception difficult.
For memory devices with the RAMBUS standards, an output-level adjusting command from a memory controller is supplied to the individual memory devices installed on the board, the output level is then checked and the number of output transistors is selected so that the output level falls within the specified level. The details are described in WO 93/21572.
The adjustment of the output levels of memory devices with the RAMBUS standards is accomplished by sending an output-level adjusting command to the individual memory devices from the system side or the memory controller. In the case of a memory system that has a plurality of memory modules on which a plurality of memory devices are mounted, therefore, it is necessary to supply the adjustment command to the multiple memory devices. This puts a great burden on the system.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a semiconductor device which can automatically execute an output-level adjusting operation upon power-on or in response to reception of a predetermined signal.
It is another object of this invention to provide a semiconductor device which can automatically execute an output-level adjusting operation even in a semiconductor module that has a plurality of semiconductor devices upon power-on or in response to reception of a predetermined signal, and that semiconductor module.
It is a further object of this invention to provide a semiconductor device, a semiconductor module and a system which can automatically execute an output-level adjusting operation for all semiconductor device even in a system having a plurality of semiconductor modules upon power-on or in response to reception of a predetermined signal.
To achieve the above objects, according to one aspect of the present invention, there is provided a semiconductor device having an output circuit for outputting a predetermined signal, which comprises an output-level adjusting circuit for adjusting an output level of the output circuit in response to an adjustment start signal externally supplied and outputting an adjustment end signal upon completion of adjustment.
A preferable mode of this invention is a module in which a plurality of semiconductor devices mentioned above are mounted on a module board. This module has an adjustment-start-signal terminal for receiving the adjustment start signal externally supplied and supplying the adjustment start signal to the semiconductor devices, and an adjustment-end-signal terminal for outputting a module adjustment end signal in response to adjustment end signals from the semiconductor devices. Further, a system is equipped with a plurality of such modules in such a way that the adjustment-end-signal terminal of the (N−1)-th module is connected to the adjustment-start-signal terminal of the N-th module.
According to a more preferable mode, the adjustment-start-signal terminal of the first module in the above system is connected to a voltage supply whereby the semiconductor devices in the first module perform an output-level adjustment, then the semiconductor devices in the second module perform an output-level adjustment in response to the completion of the former adjustment and such an output-level adjustment is likewise automatically carried out in order to the last module.
Even if the outputs of a plurality of modules are connected in parallel to the bus, the individual modules can detect their turns based on the adjustment start signal and can thus execute an output-level adjustment in order one at a time.
To achieve the above objects, according to another aspect of the present invention, there is provided a module which comprises a module board on which the plurality of above semiconductor devices are mounted; an adjustment-start-signal terminal, provided on the module board, for receiving an adjustment start signal and supplying the adjustment start signal to the plurality of semiconductor devices; and an adjustment-end-signal terminal for outputting a module adjustment end signal in response to adjustment end signals from the plurality of semiconductor devices.
To achieve the above objects, according to a further aspect of the present invention, there is provided a module which comprises a module board on which the plurality of above semiconductor devices are mounted; an adjustment-start-signal terminal, provided on the module board, for receiving an adjustment start signal and supplying the adjustment start signal to the plurality of semiconductor devices; and an adjustment-end-signal terminal, connected in a wired-OR fashion to an open-drain output of the plurality of semiconductor devices, for outputting a module adjustment end signal upon completion of adjustment of the plurality of semiconductor devices.
To achieve the above objects, according to a still further aspect of the present invention, there is provided a system having M (M being plural) modules as recited above installed therein, wherein an adjustment-end-signal terminal of an (N−
1
)-th module (N being an integer equal to or greater than 2 and equal to or less than M) is connected to an adjustment-start-signal terminal of an N-th module and output-level adjustment is carried out in order from a first module to an M-th module.
REFERENCES:
patent: 4513256 (1985-04-01), Kurihara et al.
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5543707 (1996-08-01), Yoneyama et al.
patent: 5631709 (1997-05-01), Lam et al.
patent: 6268665 (2001-07-01), Bobry
patent: 6310496 (2001-10-01), Nomura
Matsuzaki Yasurou
Saitou Masahiko
Arent Fox Kintner & Plotkin & Kahn, PLLC
Fujitsu Limited
Wells Kenneth B.
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