Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2000-10-13
2004-05-04
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S106000, C438S109000, C438S112000, C438S025000, C438S051000, C438S055000, C438S064000, C438S123000, C438S124000, C438S127000, C257S678000, C257S686000, C257S687000
Reexamination Certificate
active
06730544
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor packages, leadframe assemblies therefor and a method of manufacture, and more particularly, but not by way of limitation, to a stackable semiconductor package and a method for manufacturing the same.
2. History of Related Art
It is conventional in the electronic industry to encapsulate one or more semiconductor devices, such as integrated circuit dies, or chips, in a semiconductor package. These plastic packages protect a chip from environmental hazards, and provide a method of and apparatus for electrically and mechanically attaching the chip to an intended device. Recently, such semiconductor packages have included metal lead frames for supporting an integrated circuit chip which is bonded to a chip paddle region formed centrally therein. Bond wires which electrically connect pads on the integrated circuit chip to individual leads of the lead frame are then incorporated. A hard plastic encapsulating material, or encapsulant, which covers the bond wire, the integrated circuit chip and other components, forms the exterior of the package. A primary focus in this design is to provide the chip with adequate protection from the external environment in a reliable and effective manner.
As set forth above, the semiconductor package therein described incorporates a lead frame as the central supporting structure of such a package. A portion of the lead frame completely surrounded by the plastic encapsulant is internal to the package. Portions of the lead frame extend internally from the package and are then used to connect the package externally. More information relative to lead frame technology may be found in Chapter 8 of the book Micro Electronics Packaging Handbook, (1989), edited by R. Tummala and E. Rymaszewski, incorporated by reference herein. This book is published by Van Nostrand Reinhold, 115 Fifth Avenue, New York, N.Y.
Once the integrated circuit chips have been produced and encapsulated in semiconductor packages described above, they may be used in a wide variety of electronic appliances. The variety of electronic devices utilizing semiconductor packages has grown dramatically in recent years. These devices include cellular phones, portable computers, etc. Each of these devices typically include a printed circuit board on which a significant number of such semiconductor packages are secured to provide multiple electronic functions. These electronic appliances are typically manufactured in reduced sizes and at reduced costs, which results in increased consumer demand. Accordingly, not only are semiconductor chips highly integrated, but also semiconductor packages are highly miniaturized with an increased level of package mounting density.
According to such miniaturization tendencies, semiconductor packages, which transmit electrical signals from semiconductor chips to printed circuit boards and support the semiconductor chips on the printed circuit boards, have been designed to have a small size. By way of example only, such semiconductor packages may have a size on the order of 1×1 mm to 10×10 mm.
Even though semiconductor packages have been miniaturized, space on a printed circuit board remains limited and precious. Thus, there is a need to find both a method and a carrier package design to maximize the number of semiconductor packages that can be fitted onto an electronic device, yet minimize the space needed to attach these semiconductor packages. One method to minimize the space needed to attach the semiconductor packages is to stack the semiconductor packages on top of each other.
BRIEF SUMMARY OF THE INVENTION
The present invention relates to stackable semiconductor packages and methods for manufacturing the same. More particularly, one aspect of various embodiments of the present invention comprises a semiconductor package wherein the semiconductor package includes a lead frame, a semiconductor chip, a plurality of electrical paths electrically connecting the semiconductor chip to the leadframe, and a sealing material. The leadframe has a plurality of leads, each one of the plurality of leads having a top portion exposed to a top surface of the semiconductor package and a bottom portion resting flush with a bottom surface of the semiconductor package. In this manner, the leads extending from the top to the bottom surface of the semiconductor package provide an electrical path for connecting and electrically powering a second semiconductor package stacked on top of a first semiconductor package.
In another aspect, the present invention relates to a method for stacking semiconductor packages. More particularly, the method comprises the steps of physically and electrically connecting a bottom surface of a first semiconductor package to a printed circuit board, the first semiconductor package having a plurality of leads, each one of the first plurality of leads having a first section exposed to a first top surface of the first semiconductor package and a second section resting flush against a first bottom surface of the first semiconductor package. A second semiconductor package is then physically and electrically connected to the top of the first semiconductor package. The second semiconductor package includes a second plurality of leads in generally the same position as the first plurality of leads.
REFERENCES:
patent: 4530152 (1985-07-01), Roche et al.
patent: 5041902 (1991-08-01), McShane
patent: 5157480 (1992-10-01), McShane et al.
patent: 5172213 (1992-12-01), Zimmerman
patent: 5172214 (1992-12-01), Casto
patent: 5278446 (1994-01-01), Nagaraj et al.
patent: 5335771 (1994-08-01), Murphy
patent: 5428248 (1995-06-01), Cha
patent: 5471088 (1995-11-01), Song
patent: 5521429 (1996-05-01), Aono et al.
patent: 5701034 (1997-12-01), Marrs
patent: 5783861 (1998-07-01), Son
patent: 5821457 (1998-10-01), Mosley et al.
patent: 5835988 (1998-11-01), Ishii
patent: 5866939 (1999-02-01), Shin et al.
patent: 5894108 (1999-04-01), Mostafazadeh et al.
patent: 5977613 (1999-11-01), Takata et al.
patent: 5977630 (1999-11-01), Woodworth et al.
patent: 6143981 (2000-11-01), Glenn
patent: 6229200 (2001-05-01), Mclellan et al.
patent: 6242281 (2001-06-01), Mclellan et al.
patent: 6294100 (2001-09-01), Fan et al.
patent: 6297548 (2001-10-01), Moden et al.
patent: 6355502 (2002-03-01), Kang et al.
patent: 2002/0100963 (2002-08-01), Suzuki et al.
patent: 57-45959 (1982-03-01), None
patent: 58-101317 (1983-06-01), None
patent: 58-160095 (1983-09-01), None
patent: 61-39555 (1986-02-01), None
patent: 62-9639 (1987-01-01), None
patent: 63-205935 (1988-08-01), None
patent: 63-233555 (1988-09-01), None
patent: 64-54749 (1989-03-01), None
patent: 07-312405 (1995-11-01), None
patent: 08-125066 (1996-05-01), None
patent: 08-306853 (1996-11-01), None
patent: 09-8205 (1997-01-01), None
patent: 09-8206 (1997-01-01), None
patent: 09-8207 (1997-01-01), None
patent: 09-92775 (1997-04-01), None
patent: 92-10286 (1992-06-01), None
patent: 92-10286 (1992-11-01), None
patent: 96-9774 (1996-03-01), None
patent: 96-9774 (1996-07-01), None
S.F Sarawi et al. “A review of 3-d packaging” IEEE Transactions on components packaging and Manufacturing Technology vol. 21 #1 Feb. 1998 p. 2-14.
Lee Granvill D
Smith Matthew
Stetina Brunda Garred & Brucker
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