Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-11-28
2004-04-06
Jeanglaude, Jean (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S141000
Reexamination Certificate
active
06717539
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to digital-to-analog converters; and more specifically, high output power digital-to-analog converters.
2. Description of Related Art
Conventional digital-to-analog converters DACs, such as for an ADSL modem, cannot drive the desired load. As a result, designers of DACs resort to using a linear driver stage (e.g., an amplifier) to boost the operating current and voltage. However, linear amplification of current and voltage with AC components that extend out to 2 MHz is difficult and inefficient. Designers of the linear amplifiers make tradeoffs that harm distortion, drive level, or frequency response because of the device limitations and cost constraints. It is possible to achieve low distortion, but the cost in power consumption is very high. Efficiency on the order of 10% is common with these linear techniques.
SUMMARY OF THE PRESENT INVENTION
The digital-to-analog converter of the present invention eliminates the need for a linear amplification stage, and provides a simple and efficient conversion out to the 2 MHz range. Unlike conventional DACs that require converting the digital data to a current and then converting the current to an output voltage or require performing a current steering operation, the DAC of the present invention directly converts the digital data to an output voltage.
In a preferred embodiment, control signals representing the digital data are supplied to respective converting elements. Each converting element or converter selectively applies a voltage to an output line in response to the respectively received control signal. More specifically, the converter includes a switch that selectively connects the output line via a resistor to a voltage line having a predetermined voltage.
Furthermore, in the preferred embodiment, signal dependent error between adjacent samples, which shows up as harmonic distortion in the analog output signal, is eliminated. The preferred embodiment of the DAC according to the present invention includes reset circuitry that applies a zero value digital signal, preferably at the switches that selectively connect the output line via a resistor to a voltage line having a predetermined voltage. This zero value signal has the effect of adjusting the analog output signal to a reset voltage level between samples. This eliminates the above-mentioned harmonic distortion.
The system for performing digital-to-analog conversion, which includes the DAC of the present invention, also allows reduction in the number of bits representing a sample. In the system according to the present invention, the noise in the digital data is shifted to the upper frequency range, away from the desired frequency spectrum, and then filtered out from the analog output. Because of this noise shaping and filtering, fewer bits are required to obtain the same signal-to-noise ratio as compared to a lack of noise shaping and filtering.
REFERENCES:
patent: 4430642 (1984-02-01), Weigand et al.
patent: 4535371 (1985-08-01), Harr et al.
patent: 5055844 (1991-10-01), Kasai
patent: 5221926 (1993-06-01), Jackson
patent: 5243347 (1993-09-01), Jackson et al.
patent: 5294929 (1994-03-01), Numata et al.
patent: 5321401 (1994-06-01), White
patent: 5793320 (1998-08-01), Keum et al.
patent: 5946206 (1999-08-01), Shimizu et al.
patent: 5952948 (1999-09-01), Proebsting
patent: 6222473 (2001-04-01), Castaneda et al.
patent: 6304241 (2001-10-01), Udo et al.
Carley, L. Richard, “A Noise-Shaping Coder Topology for 15+ Bit Converters,”IEEE J. Solid-State Circuits, vol. SC-24, pp. 267-273, Apr. 1989.
Roettcher, Ulrich et al., “A Compatible CMOS-JFET Pulse Density Modulator for Interpolative High-Resolution A/D Conversion,”IEEE J. Solid-State Circuits, vol. SC-21, pp. 446-452, Jun. 1986.
Van der Plas, Geert A. M. et al., “A 14-bit Intrinsic Accuracy Q2Random Walk CMOS DAC,”IEEE J. Solid-State Circuits, vol. 34, No. 12, pp. 1708-1718, Dec. 1999.
Fischer Jonathan Herman
Laturell Donald Raymond
Agere Systems Inc.
Jeanglaude Jean
LandOfFree
Digital-to-analog converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital-to-analog converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital-to-analog converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3193273