Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2002-11-27
2004-07-27
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S052000, C327S053000
Reexamination Certificate
active
06768348
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, particularly to a sense amplifier used in a semiconductor device especially including a thin film transistor.
2. Description of the Related Art
In a semiconductor memory apparatus, a sense amplifier is used for reading stored data. The construction and the operation of an example of a conventional sense amplifier will be described with reference to FIG.
26
. In
FIG. 26
, gates of NMOS transistors MN
1
and MN
2
are connected to a first input terminal IN
1
and a second input terminal IN
2
, respectively, corresponding to a pair of bit lines. Both sources of the PMOS load transistors MP
1
and MP
2
are connected to a power source VDD. The PMOS load transistors MP
1
and MP
2
have a common gate, which is further connected to a drain of the MP
1
. The drain of the MP
1
is connected to the drain of the MN
1
. The drain of MP
2
is connected to the drain of the MN
2
and an output terminal OUT. The MN
1
and the MN
2
have a common source, which is connected to the drain of an NMOS transistor MN
3
functioning as a direct current source. The gate and the source of the MN
3
are connected to a bias power source V_BIAS and a power source GND, respectively. The sense amplifier shown in
FIG. 26
is included in a current mirror type differential amplifier.
In a semiconductor memory apparatus, when stored data is read out, differential potentials, which are opposite in height, occur in a pair of bit lines depending on whether the data is “Hi” or “Lo”. The sense amplifier shown in
FIG. 26
detects a small potential difference of signals in bit line sent to the first input terminal IN
1
and the second input terminal IN
2
. Then the sense amplifier amplifies and output the result. In other words, when the potential of IN
2
is larger than the potential of the IN
1
, the output terminal OUT outputs “Lo”. On the other hand, when the potential of the IN
2
is smaller than the potential of the IN
1
, the output terminal OUT outputs “Hi”. In this way, the sense amplifier is used for reading data stored in the semiconductor memory apparatus.
Recently, an active matrix type image display apparatus using an image display device, especially, a thin film transistor (called TFT hereinafter) having a semiconductor thin film on a glass substrate, has been widely spread. The active matrix type image display apparatus (called image display apparatus, hereinafter) using a TFT has hundreds and thousands to several millions TFT's arranged in matrix and controls charges of pixels. Furthermore, a TFT technology (such as polysilicon TFT technology) is evolving recently in which not only pixel TFT is used to construct a pixel but also TFT's are used for forming a drive circuit, a memory circuit, a control circuit and even CPU at the same time.
However, according to the current TFT technology, the variation in characteristic of transistors is larger than that of the technology in which at least one transistor is formed on a single crystal Si substrate. This means that the circuit in the conventional example shown in
FIG. 26
is difficult to use in the present TFT technology. For example, it is assumed that threshold values of the NMOS transistors MN
1
and MN
2
are 1.0 V and 1.5 V, resulting in a difference of 0.5 V. When the potential of the second input terminal IN
2
is 0.2 V larger than the potential of the first input terminal IN
1
, the output OUT should be “Lo”. However, in reality, the output OUT is “Hi”, resulting in a wrong operation. This is critical when the conventional circuit is used as a read circuit for a dynamic random access memory (DRAM).
When the conventional circuit is used as a read circuit for a static random access memory (SRAM), the potential difference between the input terminals is increased over time. At last, the potential difference absorbs the variation in threshold values of the NMOS transistors MN
1
and MN
2
. Thus, the possibility of causing the wrong operation is decreased. However, the large input potential difference absorbing the threshold variation takes time to obtain. As a result, the reading time becomes longer.
SUMMARY OF THE INVENTION
Accordingly, in view of these problems, it is an object of the present invention to provide a sense amplifier suppressing an effect of the threshold variation. It is another object of the present invention to provide a sense amplifier including TFT's having good characteristics.
In order to achieve these objects, a sense amplifier according to the present invention has a construction as follows:
According to one aspect of the present invention, there is provided a sense amplifier for detecting a potential difference of signals input to a first input terminal and a second input terminal, including a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors, wherein a threshold variation of the first and second transistors are corrected.
The first and second transistors may have a common source, which is connected to a first power source through a first switch.
The first and second transistor may have drains connected to a second power source through second and third switches, respectively. The drain of the first transistor may be connected to a second power source through a second switch and a first resistor, and the drain of the second transistor may be connected to the second power source through a third switch and a second resistor.
Preferably, the drain of the first transistor is connected to a second power source through a second switch and a third transistor. The drain of the second transistor may be connected to the second power source through a third switch and a fourth transistor. Both gates of the third and fourth transistors may be connected to the drain of the third transistor.
In this case, the first means may include a first switching means for controlling conduction
onconduction between gates and drains of the first and second transistors, respectively, a second switching means for controlling charging or discharging charges to the drains of the first and second transistors, respectively, and a third switching means for controlling charging or discharging charges to the sources of the first and second transistors.
The second means may be implemented through capacitors between the first and second input terminals and gates of the first and second transistors, respectively. Preferably, the second means may be implemented by having capacitors and switches connected in series between the first and second input terminals and gates of the first and second transistors, respectively, and by having fourth and fifth switches for controlling connection with a third power source at connection nodes of the two pairs of the capacitors and switches, respectively.
According to another aspect of the present invention, there is provided a sense amplifier including a first transistor having a gate connected to a first input terminal, a second transistor having a gate connected to a second input terminal, a third transistor having a source connected to a first power source, and a fourth transistor having a source connected to the first power source. In this case, sources of the first and second transistors are connected to each other. The sense amplifier detects a potential difference of two signals input to the first and second input terminals. The sense amplifier further includes a first means for causing gate-source voltages of the third and fourth transistors to store voltage corresponding to threshold values of the third and fourth transistors. In this case, a threshold variation of the third and fourth transistors is corrected.
The first means may have a first switch between the common source of the first and second transistors and a second power source, a second sw
Azami Munehiro
Kato Kiyoshi
Shionoiri Yutaka
Fish & Richardson P.C.
Lam Tuan T.
Nguyen Hiep
Semiconductor Energy Laboratory Co,. Ltd.
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