Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2001-07-23
2004-01-06
Talbott, David L. (Department: 2827)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S760000, C361S777000, C361S782000, C361S786000, C361S803000, C174S261000
Reexamination Certificate
active
06674648
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present inventions relate to semiconductor chip modules and, more particularly, to layouts for paths for circuit boards and modules.
2. Background Art
Modules include circuit boards, such as printed circuit boards (PCBs), that have chips (integrated circuits) on one or both sides of the modules. Examples of memory modules include single in line memory modules (SIMMs) and dual in line memory modules (DIMMs). The modules are positioned on motherboards, which may also support a controller, such as a memory controller (which may be integrated with other chipset functions or in a processor).
Traditional bus design, such as that used by current synchronous dynamic random access memories (SDRAMs) and double data rate (DDR) SDRAMs, involves the use of relatively long stubs (called a stubbed bus) as described in the following example in which two modules and a controller are on a motherboard. A bus of conductors extends a portion of the motherboard from the controller to the first and second modules. When the bus is adjacent the first module, relatively long stubs from the bus extend to the first module and to package connections of chips in the module. Likewise, when the bus is adjacent the second module, relatively long stubs from the bus extend to the second module and to package connections of chips in the second module. Package connections are used to interface with the world outside the chip. Examples of package connections include pins and balls (such as for ball grid arrays or flip chip arrangements).
Electrical reflections occur as a result of the stub. Electrical reflections from relatively long stubs tend to slow the maximum rate at which voltage switches may occur. Some systems have been used with very short stubs extending to chips from busses in the modules.
Changes in impedance can cause undesirable reflections. When changes in impedances are necessary, it may be desirable to increase or decrease impedances in steps. In the case in which a conductor splits into two sections, it is often desirable to raise the impedance of the two sections following the split to be about twice that of the section before the split. However, achieving this ratio is not always practical and a lower ratio may be used.
A path typically at least one termination device (called a termination), such as a termination resistor, to allow electrical energy to dissipate. Terminations may be positioned on the device originating the signal (for example, the controller), on the motherboard, on the module, on the die (chip), and/or in the package. Terminations are positioned between the conductor to be terminated and a reference voltage node, for example, having a ground voltage, a power supply voltage, or some other voltage.
REFERENCES:
patent: 3992686 (1976-11-01), Canning
patent: 4862161 (1989-08-01), Schomers
patent: 5467455 (1995-11-01), Gay et al.
patent: 5495435 (1996-02-01), Sugahara
patent: 5530623 (1996-06-01), Sanwo et al.
patent: 5598408 (1997-01-01), Nickolls et al.
patent: 5638402 (1997-06-01), Osaka et al.
patent: 5680555 (1997-10-01), Bodo et al.
patent: 5706447 (1998-01-01), Vivio
patent: 5734208 (1998-03-01), Jones
patent: 5919252 (1999-07-01), Klein
patent: 6067594 (2000-05-01), Perino et al.
patent: 6075704 (2000-06-01), Amberg et al.
patent: 6081430 (2000-06-01), La Rue
patent: 6104629 (2000-08-01), Wu
patent: 6108740 (2000-08-01), Caldwell
patent: 6109929 (2000-08-01), Jasper
patent: 6115278 (2000-09-01), Deneroff et al.
patent: 6122695 (2000-09-01), Cronin
patent: 6128685 (2000-10-01), Cronin
patent: 6249832 (2001-06-01), Sanders et al.
patent: 6262940 (2001-07-01), Choi et al.
patent: 6266252 (2001-07-01), Karabatsos
patent: 6266730 (2001-07-01), Perino et al.
patent: 6308232 (2001-10-01), Gasbarro
patent: 6144576 (2001-11-01), Leddige et al.
patent: 6317352 (2001-11-01), Halbert et al.
patent: 6328572 (2001-12-01), Higashida et al.
patent: 6349050 (2002-02-01), Woo et al.
patent: 6353539 (2002-03-01), Horine et al.
patent: 6376904 (2002-04-01), Haba et al.
patent: 6381164 (2002-04-01), Fan et al.
patent: 6404660 (2002-06-01), Gamini et al.
patent: 6438012 (2002-08-01), Osaka et al.
patent: 6496445 (2002-12-01), Lee
patent: WO 00/28661 (2000-05-01), None
A. Becker, “Reports on the death of MCMs are premature,” Portable Design, May 2001, pp. 18 and 20.
Horine Bryce D.
McCall James A.
To Hing Thomas Y.
Aldous Alan K.
Intel Corporation
Talbott David L.
Vigushin John B.
LandOfFree
Termination cards and systems therefore does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Termination cards and systems therefore, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Termination cards and systems therefore will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3185892